Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.

A pre-distorter that both accurately compensates for the non-linearities of a radio frequency transmit chain, and that imposes as few computation requirements in terms of arithmetic operations, uses a diverse set of real-valued signals that are derived from separate band signals that make up the input signal. The derived real signals are passed through configurable non-linear transformations, which may be adapted during operation, and which may be efficiently implemented using lookup tables. The outputs of the non-linear transformations serve as gain terms for a set of complex signals, which are functions of the input, and which are summed to compute the pre-distorted signal. A small set of the complex signals and derived real signals may be selected for a particular system to match the classes of non-linearities exhibited by the system, thereby providing further computational savings, and reducing complexity of adapting the pre-distortion through adapting of the non-linear transformations.

A pre-distorter that both accurately compensates for the non-linearities of a radio frequency transmit chain, and that imposes as few computation requirements in terms of arithmetic operations, uses a diverse set of real-valued signals that are derived from separate band signals that make up the input signal. The derived real signals are passed through configurable non-linear transformations, which may be adapted during operation, and which may be efficiently implemented using lookup tables. The outputs of the non-linear transformations serve as gain terms for a set of complex signals, which are functions of the input, and which are summed to compute the pre-distorted signal. A small set of the complex signals and derived real signals may be selected for a particular system to match the classes of non-linearities exhibited by the system, thereby providing further computational savings, and reducing complexity of adapting the pre-distortion through adapting of the non-linear transformations.

An envelope tracking supply modulator includes an amplifier circuit and a zero peaking circuit. The amplifier circuit receives an envelope input, generates a modulated supply voltage according to the envelope input, and provides the modulated supply voltage to a power amplifier. The zero peaking circuit is coupled to the amplifier circuit, and applies zero peaking to the amplifier circuit, where the zero peaking inserts a zero at a frequency.

A receiver front end is provided with a bypass mode of operation in which a received carrier-aggregated RF signal bypasses a bandpass filter to drive a broadband low-noise amplifier. The low-noise amplifier amplifies the carrier-aggregated RF signal to form an amplified RF signal.

A semiconductor device is proposed. The semiconductor device includes a group III-N semiconductor layer, an electrically insulating material layer located on the group III-N semiconductor layer, and a metal contact structure located on the electrically insulating material layer. An electrical resistance between the metal contact structure and the group III-N semiconductor layer through the electrically insulating material layer is smaller than 1*10.sup.7 for an area of 1 mm.sup.2. Further, semiconductor devices including a low resistance contact structure, radio frequency devices, and methods for forming semiconductor devices are proposed.

A semiconductor device is proposed. The semiconductor device includes a group III-N semiconductor layer, an electrically insulating material layer located on the group III-N semiconductor layer, and a metal contact structure located on the electrically insulating material layer. An electrical resistance between the metal contact structure and the group III-N semiconductor layer through the electrically insulating material layer is smaller than 1*10.sup.7 for an area of 1 mm.sup.2. Further, semiconductor devices including a low resistance contact structure, radio frequency devices, and methods for forming semiconductor devices are proposed.

A power amplifier circuit includes an amplifier element that amplifies a signal input to a base and outputs an amplified signal from a collector, and a variable capacitor provided between the base and the collector of the amplifier element. A power-supply voltage that varies in accordance with an envelope of amplitude of a radio-frequency signal is applied to the collector of the amplifier element, and capacitance of the variable capacitor decreases in response to an increase in the power-supply voltage input to the collector of the amplifier element.

A power amplifier circuit includes an amplifier element that amplifies a signal input to a base and outputs an amplified signal from a collector, and a variable capacitor provided between the base and the collector of the amplifier element. A power-supply voltage that varies in accordance with an envelope of amplitude of a radio-frequency signal is applied to the collector of the amplifier element, and capacitance of the variable capacitor decreases in response to an increase in the power-supply voltage input to the collector of the amplifier element.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.