A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

A non-linear high-frequency amplifier arrangement suitable for generating power outputs >1kW at frequencies of >1MHz for plasma excitation is provided. The arrangement includes two LDMOS transistors each connected by their source connection to aground connection point, where the LDMOS transistors have the same design and are arranged in an assembly, a power transformer whose primary winding is connected to drain connections of the LDMOS transistors, a signal transformer whose secondary winding is connected by a first end to a gate connection of one LDMOS transistor and by a second end to a gate connection of the other LDMOS transistor, and a feedback path from the drain connection to the gate connection of each of the LDMOS transistors.

A non-linear high-frequency amplifier arrangement suitable for generating power outputs >1kW at frequencies of >1MHz for plasma excitation is provided. The arrangement includes two LDMOS transistors each connected by their source connection to aground connection point, where the LDMOS transistors have the same design and are arranged in an assembly, a power transformer whose primary winding is connected to drain connections of the LDMOS transistors, a signal transformer whose secondary winding is connected by a first end to a gate connection of one LDMOS transistor and by a second end to a gate connection of the other LDMOS transistor, and a feedback path from the drain connection to the gate connection of each of the LDMOS transistors.

A compound semiconductor device includes a substrate, a compound semiconductor layer formed over the substrate, a channel layer formed over the compound semiconductor layer, an electron supply layer formed over the channel layer, and a source electrode, a drain electrode, and a gate electrode that are formed apart from each other over the electron supply layer. A quantum well structure is formed by the compound semiconductor layer, the channel layer, and the electron supply layer.

A compound semiconductor device includes a substrate, a compound semiconductor layer formed over the substrate, a channel layer formed over the compound semiconductor layer, an electron supply layer formed over the channel layer, and a source electrode, a drain electrode, and a gate electrode that are formed apart from each other over the electron supply layer. A quantum well structure is formed by the compound semiconductor layer, the channel layer, and the electron supply layer.

A method for performing predictive maintenance of an amplifier module is described. At least one parameter of at least one amplifier module is acquired via a measurement data acquisition unit. The at least one parameter acquired is analyzed via a measurement data analyzing unit so as to predict the probability and/or time of default of the at least one amplifier module. Further, a system is described.

A method for performing predictive maintenance of an amplifier module is described. At least one parameter of at least one amplifier module is acquired via a measurement data acquisition unit. The at least one parameter acquired is analyzed via a measurement data analyzing unit so as to predict the probability and/or time of default of the at least one amplifier module. Further, a system is described.

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention.