A tunable amplifier includes continuous tunability for both frequency and power levels. The tunable amplifier includes a combination of a tunable series resonator and a multi-stage LC network as the output matching network. The tunable amplifier incorporates a variable diode varactor with high breakdown voltage and high tuning range into a tunable resonator. The tunable resonator is connected to a fixed output matching network to enable a wide range of operating frequencies. The tunable amplifier enables high power, high efficiency, broadband and load-modulated power amplification, which is greatly desired for next-generation wireless communication systems and other high-frequency applications.

A tunable amplifier includes continuous tunability for both frequency and power levels. The tunable amplifier includes a combination of a tunable series resonator and a multi-stage LC network as the output matching network. The tunable amplifier incorporates a variable diode varactor with high breakdown voltage and high tuning range into a tunable resonator. The tunable resonator is connected to a fixed output matching network to enable a wide range of operating frequencies. The tunable amplifier enables high power, high efficiency, broadband and load-modulated power amplification, which is greatly desired for next-generation wireless communication systems and other high-frequency applications.

Power amplification system is disclosed. A power amplification system can include a Class-E push-pull amplifier including a transformer balun. The power amplification can further include a reactance compensation circuit coupled to the transformer balun. In some embodiments, the reactance compensation circuit is configured to reduce variation over frequency of a fundamental load impedance of the power amplification system.

Power amplification system is disclosed. A power amplification system can include a Class-E push-pull amplifier including a transformer balun. The power amplification can further include a reactance compensation circuit coupled to the transformer balun. In some embodiments, the reactance compensation circuit is configured to reduce variation over frequency of a fundamental load impedance of the power amplification system.

Methods and devices used in mobile receiver front end to support multiple paths and multiple frequency bands are described. The presented devices and methods provide benefits of scalability, frequency band agility, as well as size reduction by using one low noise amplifier per simultaneous outputs. Based on the disclosed teachings, variable gain amplification of multiband signals is also presented.

A radio frequency transmitter includes a digital-to-analog converter, a passive network, two buffers, a frequency mixer, and a power amplifier. Two output ends of the digital-to-analog converter are respectively coupled to two input nodes of the passive network, and the two output ends of the digital-to-analog converter are respectively coupled to input ends of the two buffers. Output ends of the two buffers are respectively coupled to two input ends of the frequency mixer. An output end of the frequency mixer is coupled to an input end of the power amplifier. An output end of the power amplifier is coupled to an antenna. The passive network is configured to perform filtering processing on an input current signal, and convert the current signal into a voltage signal.

Power amplifiers such as multi-path power amplifiers, systems employing such amplifiers, and methods of implementing amplifiers and amplifier systems are disclosed herein. In one example embodiment, a multi-path power amplifier includes a first semiconductor die with an integrated first transistor having a first source-to-drain pitch, and a second semiconductor die with an integrated second transistor having a second source-to-drain pitch, where the second source-to-drain pitch is smaller than the first source-to-drain pitch by at least 30 percent. In another example embodiment, a Doherty amplifier system includes a first semiconductor die with a first physical die area to total gate periphery ratio, and a second semiconductor die with a second physical die area to total gate periphery ratio, where the second physical die area to total gate periphery ratio is smaller than the first physical die area to total gate periphery ratio by at least 30 percent.

Power amplifiers such as multi-path power amplifiers, systems employing such amplifiers, and methods of implementing amplifiers and amplifier systems are disclosed herein. In one example embodiment, a multi-path power amplifier includes a first semiconductor die with an integrated first transistor having a first source-to-drain pitch, and a second semiconductor die with an integrated second transistor having a second source-to-drain pitch, where the second source-to-drain pitch is smaller than the first source-to-drain pitch by at least 30 percent. In another example embodiment, a Doherty amplifier system includes a first semiconductor die with a first physical die area to total gate periphery ratio, and a second semiconductor die with a second physical die area to total gate periphery ratio, where the second physical die area to total gate periphery ratio is smaller than the first physical die area to total gate periphery ratio by at least 30 percent.

A power amplifier cell comprising a first power amplifier, a second power amplifier and a balun. The balun comprises a first inductor and a second inductor that define a first transformer; and a third inductor and a fourth inductor that define a second transformer. The following: (i) a parasitic capacitance of the first power amplifier; (ii) a leakage inductance of the first transformer; and (iii) a capacitive coupling between the first inductor and the second inductor, contribute to a first impedance matching circuit for the first power amplifier. Also, the following (iv) a parasitic capacitance of the second power amplifier; (v) a leakage inductance of the second transformer; and (vi) a capacitive coupling between the third inductor and the fourth inductor, contribute to a second impedance matching circuit for the second power amplifier.

A power amplifier cell comprising a first power amplifier, a second power amplifier and a balun. The balun comprises a first inductor and a second inductor that define a first transformer; and a third inductor and a fourth inductor that define a second transformer. The following: (i) a parasitic capacitance of the first power amplifier; (ii) a leakage inductance of the first transformer; and (iii) a capacitive coupling between the first inductor and the second inductor, contribute to a first impedance matching circuit for the first power amplifier. Also, the following (iv) a parasitic capacitance of the second power amplifier; (v) a leakage inductance of the second transformer; and (vi) a capacitive coupling between the third inductor and the fourth inductor, contribute to a second impedance matching circuit for the second power amplifier.