H03F3/193

AMPLIFICATION CIRCUIT, AND RECEIVING CIRCUIT, SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM USING THE AMPLIFICATION CIRCUIT
20200021260 · 2020-01-16 · ·

An amplification circuit configured to generate an output signal by differentially amplifying first and second input signals. The first and second input signals are a differential signal pair. Alternatively, the first input signal is a single-ended signal, and the second input signal is a reference signal. The amplification circuit is configured to perform a differential amplification operation by increasing a gain for generating an output signal based on the first input signal.

Variable gain power amplifiers

A variable-gain power amplifying technique includes generating, with a network of one or more reactive components included in an oscillator, a first oscillating signal, and outputting, via one or more taps included in the network of the reactive components, a second oscillating signal. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power-amplified output signal, and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal.

Amplifier architectures with bypass circuits and resonant structures

The disclosed technology is related to a radio-frequency (RF) amplifier having a bypass circuit and a resonant structure to improve performance in a bypass mode (e.g., a low gain mode). The disclosed amplifiers have a resonant structure that effectively isolates an amplifier core from a bypass circuit. For example, in a bypass mode, the resonant structure is configured to create an open impedance looking into the amplifier core input. This effectively removes any loading from the amplifier core to the bypass circuit. The disclosed amplifiers with resonant structures improve linearity performance in bypass modes due at least in part to the open impedance to the amplifier core provided by the resonant structure.

Amplifier architectures with bypass circuits and resonant structures

The disclosed technology is related to a radio-frequency (RF) amplifier having a bypass circuit and a resonant structure to improve performance in a bypass mode (e.g., a low gain mode). The disclosed amplifiers have a resonant structure that effectively isolates an amplifier core from a bypass circuit. For example, in a bypass mode, the resonant structure is configured to create an open impedance looking into the amplifier core input. This effectively removes any loading from the amplifier core to the bypass circuit. The disclosed amplifiers with resonant structures improve linearity performance in bypass modes due at least in part to the open impedance to the amplifier core provided by the resonant structure.

Power amplifier module using phase-change material (PCM) radio frequency (RF) switches and selectable matching networks

A power stage includes a power stage amplifier, selectable matching networks, and phase-change material (PCM) radio frequency (RF) switches. Each of the PCM RF switches includes a heating element transverse to a PCM, the heating element approximately defining an active segment of the PCM. A power stage amplifier output is connected to the PCM RF switches. Each of the PCM RF switches is connected to one of the selectable matching networks. A power stage amplifier output is coupled to or decoupled from one of the selectable matching networks by one of the PCM RF switches. In one approach, the power stage is included in a power amplifier module of a communications device. The power amplifier module further includes a bias and match controller that biases the power stage amplifier, and that uses one of the PCM RF switches to couple or decouple the power stage amplifier output.

Power amplifier module using phase-change material (PCM) radio frequency (RF) switches and selectable matching networks

A power stage includes a power stage amplifier, selectable matching networks, and phase-change material (PCM) radio frequency (RF) switches. Each of the PCM RF switches includes a heating element transverse to a PCM, the heating element approximately defining an active segment of the PCM. A power stage amplifier output is connected to the PCM RF switches. Each of the PCM RF switches is connected to one of the selectable matching networks. A power stage amplifier output is coupled to or decoupled from one of the selectable matching networks by one of the PCM RF switches. In one approach, the power stage is included in a power amplifier module of a communications device. The power amplifier module further includes a bias and match controller that biases the power stage amplifier, and that uses one of the PCM RF switches to couple or decouple the power stage amplifier output.

LOW NOISE TRANS-IMPEDANCE AMPLIFIERS BASED ON COMPLEMENTARY CURRENT-INJECTION FIELD-EFFECT TRANSISTOR DEVICES
20200014349 · 2020-01-09 ·

The present invention relates to a novel and inventive compound device structure for a low noise current amplifier or trans-impedance amplifier. The trans-impedance amplifier includes an amplifier portion, which converts current input into voltage using a complimentary pair of novel n-type and p-type current-injection field-effect transistors (NiFET and PiFET), and a bias generation portion using another complimentary pair of NiFET and PiFET. Trans-impedance of NiFET and PiFET and its gain may be configured and programmed by a ratio of width (W) over length (L) of source channel over the width (W) over length (L) of drain channel (W/L of source channel/W/L of drain channel).

LOW NOISE TRANS-IMPEDANCE AMPLIFIERS BASED ON COMPLEMENTARY CURRENT-INJECTION FIELD-EFFECT TRANSISTOR DEVICES
20200014349 · 2020-01-09 ·

The present invention relates to a novel and inventive compound device structure for a low noise current amplifier or trans-impedance amplifier. The trans-impedance amplifier includes an amplifier portion, which converts current input into voltage using a complimentary pair of novel n-type and p-type current-injection field-effect transistors (NiFET and PiFET), and a bias generation portion using another complimentary pair of NiFET and PiFET. Trans-impedance of NiFET and PiFET and its gain may be configured and programmed by a ratio of width (W) over length (L) of source channel over the width (W) over length (L) of drain channel (W/L of source channel/W/L of drain channel).

MULTI-PATH AMPLIFIER CIRCUIT OR SYSTEM AND METHODS OF IMPLEMENTATION THEREOF

Power amplifiers such as multi-path power amplifiers, systems employing such amplifiers, and methods of implementing amplifiers and amplifier systems are disclosed herein. In one example embodiment, a multi-path power amplifier includes a first semiconductor die with an integrated first transistor having a first source-to-drain pitch, and a second semiconductor die with an integrated second transistor having a second source-to-drain pitch, where the second source-to-drain pitch is smaller than the first source-to-drain pitch by at least 30 percent. In another example embodiment, a Doherty amplifier system includes a first semiconductor die with a first physical die area to total gate periphery ratio, and a second semiconductor die with a second physical die area to total gate periphery ratio, where the second physical die area to total gate periphery ratio is smaller than the first physical die area to total gate periphery ratio by at least 30 percent.

MULTI-PATH AMPLIFIER CIRCUIT OR SYSTEM AND METHODS OF IMPLEMENTATION THEREOF

Power amplifiers such as multi-path power amplifiers, systems employing such amplifiers, and methods of implementing amplifiers and amplifier systems are disclosed herein. In one example embodiment, a multi-path power amplifier includes a first semiconductor die with an integrated first transistor having a first source-to-drain pitch, and a second semiconductor die with an integrated second transistor having a second source-to-drain pitch, where the second source-to-drain pitch is smaller than the first source-to-drain pitch by at least 30 percent. In another example embodiment, a Doherty amplifier system includes a first semiconductor die with a first physical die area to total gate periphery ratio, and a second semiconductor die with a second physical die area to total gate periphery ratio, where the second physical die area to total gate periphery ratio is smaller than the first physical die area to total gate periphery ratio by at least 30 percent.