Patent classifications
H03F3/193
ULTRA-HIGH FREQUENCY AMPLIFIER
Disclosed is an ultra-high frequency amplifier which includes a first conductor connected to an amplifier input terminal to receive an RF signal applied to the amplifier input terminal, a second conductor parallel to a first portion of the first conductor, a third conductor separated from the second conductor and parallel to a second portion of the first conductor, and a transistor including a gate terminal connected to one end of the second conductor, a first terminal connected to one end of the third conductor, and a second terminal connected to an amplifier output terminal, wherein the first conductor and the second conductor form a first balun to output a first balance signal based on the RF signal, the first conductor and the third conductor form a second balun to output a second balance signal based on the RF signal.
ULTRA-HIGH FREQUENCY AMPLIFIER
Disclosed is an ultra-high frequency amplifier which includes a first conductor connected to an amplifier input terminal to receive an RF signal applied to the amplifier input terminal, a second conductor parallel to a first portion of the first conductor, a third conductor separated from the second conductor and parallel to a second portion of the first conductor, and a transistor including a gate terminal connected to one end of the second conductor, a first terminal connected to one end of the third conductor, and a second terminal connected to an amplifier output terminal, wherein the first conductor and the second conductor form a first balun to output a first balance signal based on the RF signal, the first conductor and the third conductor form a second balun to output a second balance signal based on the RF signal.
Gain-adjustable Amplifier Circuit
An amplifier circuit includes an amplifier for generating an amplified input signal according to an input signal, and an attenuator circuit coupled to the amplifier. The attenuator circuit includes an input terminal for receiving the input signal or the amplified input signal, an output terminal, a reference voltage terminal, a zeroth resistor-switch circuit, a first resistor-switch circuit, and a second resistor-switch circuit. The zeroth resistor-switch circuit includes a first terminal coupled to the input terminal, a second terminal coupled to the output terminal, a zeroth switch coupled to the first terminal of the zeroth resistor-switch circuit and the second terminal of the zeroth resistor-switch circuit, a zeroth resistor coupled between the first terminal of the zeroth resistor-switch circuit and the second terminal of the zeroth resistor-switch circuit, a first resistor coupled between the zeroth resistor and the second terminal of the zeroth resistor-switch circuit, and a first switch.
Amplifier circuit
An amplifier circuit amplifies a radio-frequency signal. The amplifier circuit includes an amplifier, an input matching circuit connected to an input side of the amplifier and matches impedance, and a protection circuit connected to a node in a path within a path between an input matching circuit and the amplifier. The protection circuit includes a first diode connected between the node and a ground, and a second diode connected in parallel with the first diode and connected in a direction opposite to the first diode between the node and the ground. A threshold voltage of each of the first diode and the second diode is greater than a maximum voltage amplitude of the input signal at the node and is less than a difference between a withstand voltage of the amplifier and the bias voltage.
Amplifier circuit
An amplifier circuit amplifies a radio-frequency signal. The amplifier circuit includes an amplifier, an input matching circuit connected to an input side of the amplifier and matches impedance, and a protection circuit connected to a node in a path within a path between an input matching circuit and the amplifier. The protection circuit includes a first diode connected between the node and a ground, and a second diode connected in parallel with the first diode and connected in a direction opposite to the first diode between the node and the ground. A threshold voltage of each of the first diode and the second diode is greater than a maximum voltage amplitude of the input signal at the node and is less than a difference between a withstand voltage of the amplifier and the bias voltage.
HIGH FREQUENCY AMPLIFIER
An amplifier (T1) amplifies an input signal. A harmonic matching circuit (3) is connected to an output end of the amplifier (T1) via a first wire (W1). The harmonic matching circuit (3) includes a first inductor (L1) connected to the first wire (W1), a first capacitor (C1) connected in series to the first inductor (L1), a second inductor (L2) connected in parallel with the first inductor (L1), and a second capacitor (C2) connected in series to the second inductor (L2). The first inductor (L1) and the second inductor (L2) form a subtractive-polarity coupler which presents mutual inductance having subtractive polarity.
HIGH FREQUENCY AMPLIFIER
An amplifier (T1) amplifies an input signal. A harmonic matching circuit (3) is connected to an output end of the amplifier (T1) via a first wire (W1). The harmonic matching circuit (3) includes a first inductor (L1) connected to the first wire (W1), a first capacitor (C1) connected in series to the first inductor (L1), a second inductor (L2) connected in parallel with the first inductor (L1), and a second capacitor (C2) connected in series to the second inductor (L2). The first inductor (L1) and the second inductor (L2) form a subtractive-polarity coupler which presents mutual inductance having subtractive polarity.
Active biconical antenna and receive array
An active biconical antenna and a receive array comprising a combination of active biconical and Vivaldi antennas. In one configuration, the active biconical antenna includes upper and lower cones. Each cone has a respective truncated apex. First and second feed points are respectively connected to the truncated apexes of the upper and lower cones and to first and second conductors. The active biconical antenna further includes a buffer amplifier having respective input terminals connected to the first and second conductors. The buffer amplifier has an input impedance that is impedance matched to an antenna impedance at and above but not below a frequency f.sub.c and is higher than the antenna impedance at frequencies substantially less than f.sub.c. The buffer amplifier also has an output impedance that is impedance matched to a system impedance at frequencies both above and below f.sub.c. A length of the first and second conductors is less than a wavelength at the frequency f.sub.c.
Dual voltage switched branch LNA architecture
Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
Dual voltage switched branch LNA architecture
Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.