H03F3/193

Semiconductor device
11949411 · 2024-04-02 · ·

A semiconductor device (1) according to the present disclosure includes: an n-channel depletion-mode transistor (10); an input matching circuit inside which the gate terminal (11) and the ground terminal (22) are DC-connected; a self-bias circuit (26) including a resistor (14) biasing the transistor (10) by a voltage drop due to a current flowing through the resistor (14), and a capacitor (15) connected in parallel to the resistor 14) and regarded as short-circuit at a frequency of the high-frequency power; and a diode (31) having an endmost anode connected to the source terminal (12) and an endmost cathode connected to the ground terminal (22), and connected in one stage or connected in series in a plurality of stages in the same direction.

Semiconductor device
11949411 · 2024-04-02 · ·

A semiconductor device (1) according to the present disclosure includes: an n-channel depletion-mode transistor (10); an input matching circuit inside which the gate terminal (11) and the ground terminal (22) are DC-connected; a self-bias circuit (26) including a resistor (14) biasing the transistor (10) by a voltage drop due to a current flowing through the resistor (14), and a capacitor (15) connected in parallel to the resistor 14) and regarded as short-circuit at a frequency of the high-frequency power; and a diode (31) having an endmost anode connected to the source terminal (12) and an endmost cathode connected to the ground terminal (22), and connected in one stage or connected in series in a plurality of stages in the same direction.

Differential amplifier circuit

A differential amplifier circuit includes a first and second amplifiers that output a differential signal in a radio-frequency band, a first inductor having a first end connected to an output end of the first amplifier, a second inductor having a first end connected to an output end of the second amplifier, a choke inductor connected to second ends of the first and second inductors, a first and second capacitors, and a switch that connects the second capacitor in parallel to the first capacitor or terminates a parallel connection of the first and second capacitors. A resonant circuit formed by connecting the first or second inductor in series with the first capacitor has a different resonant frequency from a resonant circuit formed by connecting the first or second inductor in series with the parallel-connected first and second capacitors. These resonant frequencies correspond to second harmonic frequencies of the differential signal.

Differential amplifier circuit

A differential amplifier circuit includes a first and second amplifiers that output a differential signal in a radio-frequency band, a first inductor having a first end connected to an output end of the first amplifier, a second inductor having a first end connected to an output end of the second amplifier, a choke inductor connected to second ends of the first and second inductors, a first and second capacitors, and a switch that connects the second capacitor in parallel to the first capacitor or terminates a parallel connection of the first and second capacitors. A resonant circuit formed by connecting the first or second inductor in series with the first capacitor has a different resonant frequency from a resonant circuit formed by connecting the first or second inductor in series with the parallel-connected first and second capacitors. These resonant frequencies correspond to second harmonic frequencies of the differential signal.

LOW-PROFILE MEDIUM WAVE TRANSMITTING SYSTEM
20240047872 · 2024-02-08 ·

Techniques for controlling a low-profile medium wave transmitting system are provided. An example of an antenna system according to the disclosure includes a first radiator operably coupled to a first amplifier, a first modulator operably coupled to the first amplifier and configured to provide a first radio frequency signal to the first amplifier, a second radiator operably coupled to a second amplifier, a second modulator operably coupled to the second amplifier and configured to provide a second radio frequency signal to the second amplifier, a control module operably coupled to the first modulator, first amplifier, the second modulator, and the second amplifier, the control module being configured to control a delta phase value based on the first radio frequency signal and the second radio frequency signal, and control the power output of the first amplifier and the second amplifier.

LOW-PROFILE MEDIUM WAVE TRANSMITTING SYSTEM
20240047872 · 2024-02-08 ·

Techniques for controlling a low-profile medium wave transmitting system are provided. An example of an antenna system according to the disclosure includes a first radiator operably coupled to a first amplifier, a first modulator operably coupled to the first amplifier and configured to provide a first radio frequency signal to the first amplifier, a second radiator operably coupled to a second amplifier, a second modulator operably coupled to the second amplifier and configured to provide a second radio frequency signal to the second amplifier, a control module operably coupled to the first modulator, first amplifier, the second modulator, and the second amplifier, the control module being configured to control a delta phase value based on the first radio frequency signal and the second radio frequency signal, and control the power output of the first amplifier and the second amplifier.

BIAS BLOCK FOR BIASING TRANSISTORS EXHIBITING NON-LINEARITY WHEN DESIGNED FOR LINEAR OPERATION

A bias block for providing a bias voltage includes a transistor having a control terminal, a first current terminal and a second current terminal. A voltage level at the control terminal determines a magnitude of current flowing between the first current terminal and the second current terminal. The first current terminal is coupled to a supply voltage via a first impedance and the second current terminal is coupled to a constant reference potential via a second impedance. The second current terminal provides the bias voltage. The bias block further includes a capacitor coupled between the control terminal and the second current terminal of the transistor.

Apparatus and methods for overload protection of radio frequency amplifiers
10511270 · 2019-12-17 · ·

Radio frequency amplifiers with overload protection are provided herein. In certain configurations, an RF amplifier system includes an RF amplifier that receives an RF signal from an input terminal and that generates an amplified RF signal at an output terminal, and an overload detection circuit that generates a detection signal indicating a detected signal level of the RF amplifier. The RF amplifier includes an amplification device that amplifies the RF signal and a degeneration circuit that provides degeneration to the amplification device. Additionally, the detection signal is operable to control an amount of degeneration provided by the degeneration circuit so as to protect the RF amplifier from overload.

Apparatus and methods for overload protection of radio frequency amplifiers
10511270 · 2019-12-17 · ·

Radio frequency amplifiers with overload protection are provided herein. In certain configurations, an RF amplifier system includes an RF amplifier that receives an RF signal from an input terminal and that generates an amplified RF signal at an output terminal, and an overload detection circuit that generates a detection signal indicating a detected signal level of the RF amplifier. The RF amplifier includes an amplification device that amplifies the RF signal and a degeneration circuit that provides degeneration to the amplification device. Additionally, the detection signal is operable to control an amount of degeneration provided by the degeneration circuit so as to protect the RF amplifier from overload.

High speed, high voltage, amplifier output stage using linear or class D topology
10511262 · 2019-12-17 ·

Each sub-stage of an amplifier stage includes a resistor coupled to another resistor in an adjacent sub-stage or to a high DC voltage, the resistor and the other resistor forming part of a string of equal valued resistors; an FET having a source coupled to a cathode of a Zener diode coupled in parallel with a capacitor, a drain coupled to another sub-stage in the string, an output node of the amplifier stage, or the high DC voltage; and at least one active device coupled to a gate of the FET and coupled to the resistor for providing high impedance between a voltage on a node of the resistor and the gate of the FET and a low impedance between the at least one active device and the gate of the FET, the at least one active device coupled to both the cathode and an anode of the Zener diode.