Patent classifications
H03F3/193
AMPLIFIER BIAS CIRCUIT
Methods and apparatus for an amplifier including first and second transistors coupled in a stacked configuration with first and second current mirrors to provide respective bias signals to the amplifier transistors. A reference transistor is coupled to the first and second current mirrors for referencing the bias signals together.
Method, apparatus and system for envelope tracking
This disclosure relates generally to the field of wireless communication infrastructure, and more particularly to a method, apparatus and system for envelope tracking. The system for envelope tracking comprising: a transistor; an RF transistor; a driver; a switcher current source; and a subtracting network; wherein the system is configured such that when an envelope voltage is less than a predetermined voltage value, the RF transistor is configured for decreasing an amount of absorbed biasing current, and when the envelope voltage is greater than a predetermined voltage value, the RF transistor is configured for increasing an amount of absorbed biasing current. The goal of RF transistor sinking is to absorb the redundant biasing current generated by the envelope tracking supply modulator to eliminate distortions.
Semiconductor integrated circuit and wireless transmitter
A semiconductor integrated circuit includes a first transmission power mode configured to transmit by a first power, and a second transmission power mode configured to transmit by a second power smaller than the first power, the semiconductor integrated circuit. The semiconductor integrated circuit includes a first transistor configured to receive and amplify a transmission signal in the second transmission power mode, and an attenuator including a resistor element and a switching element, provided between an output of the first transistor and an output terminal, configured to control attenuation of an output signal of the first transistor.
Semiconductor integrated circuit and wireless transmitter
A semiconductor integrated circuit includes a first transmission power mode configured to transmit by a first power, and a second transmission power mode configured to transmit by a second power smaller than the first power, the semiconductor integrated circuit. The semiconductor integrated circuit includes a first transistor configured to receive and amplify a transmission signal in the second transmission power mode, and an attenuator including a resistor element and a switching element, provided between an output of the first transistor and an output terminal, configured to control attenuation of an output signal of the first transistor.
Amplifier with triple-coupled inductors
An apparatus includes an amplifier and a first inductor coupled to an input of the amplifier. The apparatus also includes a second inductor that is inductively coupled to the first inductor and that couples the amplifier to a first supply node. The apparatus further includes a third inductor that is inductively coupled to the first inductor and to the second inductor and that couples the amplifier to a second supply node.
Amplifier with triple-coupled inductors
An apparatus includes an amplifier and a first inductor coupled to an input of the amplifier. The apparatus also includes a second inductor that is inductively coupled to the first inductor and that couples the amplifier to a first supply node. The apparatus further includes a third inductor that is inductively coupled to the first inductor and to the second inductor and that couples the amplifier to a second supply node.
Low-noise amplifier, receiver and method in a low-noise amplifier
A low-noise amplifier comprises first and second input ports respectively configured to receive a positive and negative input voltages; first and second resonance circuit, first and second transistor; wherein a first voltage output port of the first resonance circuit is connected to the second transistor, and a second voltage output port of the second resonance circuit is connected to the first transistor, the first and second voltage output ports are crossed coupled to a second node of both the first transistor and the second transistor via a first and second capacitor respectively; the second node of the second transistor is connected to both the second input port via a third capacitor and a third node of the first transistor, and the second node of the first transistor is connected to both the first input port via a fourth capacitor and a third node of the second transistor.
Low-noise amplifier, receiver and method in a low-noise amplifier
A low-noise amplifier comprises first and second input ports respectively configured to receive a positive and negative input voltages; first and second resonance circuit, first and second transistor; wherein a first voltage output port of the first resonance circuit is connected to the second transistor, and a second voltage output port of the second resonance circuit is connected to the first transistor, the first and second voltage output ports are crossed coupled to a second node of both the first transistor and the second transistor via a first and second capacitor respectively; the second node of the second transistor is connected to both the second input port via a third capacitor and a third node of the first transistor, and the second node of the first transistor is connected to both the first input port via a fourth capacitor and a third node of the second transistor.
RESONATOR CIRCUIT
The invention relates to a resonator circuit, the resonator circuit comprising a transformer comprising a primary winding and a secondary winding, wherein the primary winding is inductively coupled with the secondary winding, a primary capacitor being connected to the primary winding, the primary capacitor and the primary winding forming a primary circuit, and a secondary capacitor being connected to the secondary winding, the secondary capacitor and the secondary winding forming a secondary circuit, wherein the resonator circuit has a common mode resonance frequency at an excitation of the primary circuit in a common mode, wherein the resonator circuit has a differential mode resonance frequency at an excitation of the primary circuit in a differential mode, and wherein the common mode resonance frequency is different from the differential mode resonance frequency.
Bias techniques for amplifiers with mixed polarity transistor stacks
Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.