Patent classifications
H03F3/193
POWER AMPLIFIER
A power amplifier includes: a transistor having a gate electrode, a source electrode and a drain electrode; a passive component part connected to the gate electrode through a gate wiring; and a harmonic circuit connected between the source electrode and the gate wiring and disposed in a region between the gate electrode and the passive component part and between the source electrode and the gate wiring.
POWER AMPLIFIER
A power amplifier includes: a transistor having a gate electrode, a source electrode and a drain electrode; a passive component part connected to the gate electrode through a gate wiring; and a harmonic circuit connected between the source electrode and the gate wiring and disposed in a region between the gate electrode and the passive component part and between the source electrode and the gate wiring.
METHOD, APPARATUS AND SYSTEM FOR BACK GATE BIASING FOR FD-SOI DEVICES
At least one method, apparatus and system disclosed involves providing semiconductor device having transistors comprising back gates and front gates. The semiconductor device comprises a signal processing unit for processing an input signal to provide an output signal. The signal processing unit includes a first transistor and a second transistor. The first transistor includes a first back gate electrically coupled to a first front gate. The signal processing unit also includes a second transistor operatively coupled to the first transistor. The second transistor includes a second back gate electrically coupled to a second front gate. The semiconductor device also includes a gain circuit for providing a gain upon the output signal. The semiconductor device also includes a bias circuit to provide a first bias signal to the first back gate and a second bias signal to the second back gate.
METHOD, APPARATUS AND SYSTEM FOR BACK GATE BIASING FOR FD-SOI DEVICES
At least one method, apparatus and system disclosed involves providing semiconductor device having transistors comprising back gates and front gates. The semiconductor device comprises a signal processing unit for processing an input signal to provide an output signal. The signal processing unit includes a first transistor and a second transistor. The first transistor includes a first back gate electrically coupled to a first front gate. The signal processing unit also includes a second transistor operatively coupled to the first transistor. The second transistor includes a second back gate electrically coupled to a second front gate. The semiconductor device also includes a gain circuit for providing a gain upon the output signal. The semiconductor device also includes a bias circuit to provide a first bias signal to the first back gate and a second bias signal to the second back gate.
APPARATUS AND METHODS FOR POWER AMPLIFIERS WITH AN INJECTION-LOCKED OSCILLATOR DRIVER STAGE
Apparatus and methods for power amplifiers with an injection-locked oscillator driver stage are provided herein. In certain configurations, a multi-mode power amplifier includes a driver stage implemented using an injection-locked oscillator and an output stage having an adjustable supply voltage that changes based on a mode of the multi-mode power amplifier. By implementing the multi-mode power amplifier in this manner, the multi-mode power amplifier exhibits excellent efficiency, including when the voltage level of the adjustable supply voltage is relatively low.
ACTIVE CIRCUIT CAPABLE OF PREVENTING IMPEDANCE FROM BEING MISMATCHED IN A BYPASS MODE
An active circuit includes an active element, an input unit, and a bypass unit. The active element is coupled to an output terminal of the active circuit for outputting an output signal. The input unit is coupled to an input terminal of the active circuit, and is coupled to an input terminal of the active element through a node. The input unit adjusts a capacitance value of the input unit according to a first control signal. The bypass unit is coupled to an output terminal of the input unit through the node, and is coupled to the output terminal of the active circuit. The bypass unit turns on or off a signal bypassing path according to a second control signal.
Apparatus and method for power supply modulation
Embodiments of the invention provide an apparatus for amplifying a radio frequency transmission signal, comprising: an envelope signal obtaining unit (210) configured to obtain a slow envelope signal indicating a time averaging amplitude component of the radio frequency signal and a fast envelope signal indicating an instant amplitude component of the radio frequency signal; a supply voltage modulating unit (230) configured to provide an output modulated supply voltage to the power amplifying unit by modulating a direct current supply voltage based on both the slow envelope signal and the fast envelope signal; and a power amplifying unit (220) configured to amplify power of the radio frequency transmission signal according to the output modulated supply voltage.
Apparatus and method for power supply modulation
Embodiments of the invention provide an apparatus for amplifying a radio frequency transmission signal, comprising: an envelope signal obtaining unit (210) configured to obtain a slow envelope signal indicating a time averaging amplitude component of the radio frequency signal and a fast envelope signal indicating an instant amplitude component of the radio frequency signal; a supply voltage modulating unit (230) configured to provide an output modulated supply voltage to the power amplifying unit by modulating a direct current supply voltage based on both the slow envelope signal and the fast envelope signal; and a power amplifying unit (220) configured to amplify power of the radio frequency transmission signal according to the output modulated supply voltage.
Multiple input single output device with vector signal and bias signal inputs
Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
Multiple input single output device with vector signal and bias signal inputs
Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.