Patent classifications
H03F3/193
High frequency package
A high frequency package includes a package having an input terminal and an output terminal. A substrate housed in the package, has a first side, a second side facing the input terminal, and a third side facing the output terminal. The first side extends in a first direction and connects the second side and the third side, and the second side and the third side extend in a second direction intersecting the first direction. A coupling circuit on the substrate is electrically connected to the input terminal and the output terminal to input an input signal from the input terminal disposed at the second side of the substrate and output an output signal to the output terminal disposed at the third side of the substrate. A filter circuit on the substrate is electrically connected to the coupling circuit, an is configured to reduce third-order IMD (Inter Modulation Distortion) included in the output signal. The output signal is output from the coupling circuit in a middle of the output terminal side of the third side of the substrate. The filter circuit is arranged on an edge of the first side of the substrate, and an edge of the third side of the substrate.
High frequency package
A high frequency package includes a package having an input terminal and an output terminal. A substrate housed in the package, has a first side, a second side facing the input terminal, and a third side facing the output terminal. The first side extends in a first direction and connects the second side and the third side, and the second side and the third side extend in a second direction intersecting the first direction. A coupling circuit on the substrate is electrically connected to the input terminal and the output terminal to input an input signal from the input terminal disposed at the second side of the substrate and output an output signal to the output terminal disposed at the third side of the substrate. A filter circuit on the substrate is electrically connected to the coupling circuit, an is configured to reduce third-order IMD (Inter Modulation Distortion) included in the output signal. The output signal is output from the coupling circuit in a middle of the output terminal side of the third side of the substrate. The filter circuit is arranged on an edge of the first side of the substrate, and an edge of the third side of the substrate.
Wideband Amplifier
A wideband amplifier includes an input matching network for matching a transconductor stage to an input impedance and includes an output matching network for matching the transconductor stage to an output impedance. Both the input and output matching networks each includes a parallel LC tank circuit arranged in parallel with a series LC tank circuit. The tank circuit arrangements configure the input and output matching networks to be resonant at a first frequency, a midrange frequency that is greater than the first frequency, and a second frequency that is greater than the midrange frequency to provide wideband matching.
Wideband Amplifier
A wideband amplifier includes an input matching network for matching a transconductor stage to an input impedance and includes an output matching network for matching the transconductor stage to an output impedance. Both the input and output matching networks each includes a parallel LC tank circuit arranged in parallel with a series LC tank circuit. The tank circuit arrangements configure the input and output matching networks to be resonant at a first frequency, a midrange frequency that is greater than the first frequency, and a second frequency that is greater than the midrange frequency to provide wideband matching.
NOISE DETECTING CIRCUIT AND ASSOCIATED SYSTEM AND METHOD
A noise detecting circuit including an amplifier circuit, a filtering circuit and a comparing circuit. The amplifier circuit is arranged to amplify an input signal and output an amplified signal, wherein the input signal is received from a circuit to be detected and indicates a noise level of the circuit to be detected. The filtering circuit is coupled to the amplifier circuit and arranged to filter the amplified signal and output a filtered signal. The comparing circuit is coupled to the filtering circuit and arranged to compare the filtered signal to a reference voltage and output an output signal indicating the noise level of the circuit to be detected.
NOISE DETECTING CIRCUIT AND ASSOCIATED SYSTEM AND METHOD
A noise detecting circuit including an amplifier circuit, a filtering circuit and a comparing circuit. The amplifier circuit is arranged to amplify an input signal and output an amplified signal, wherein the input signal is received from a circuit to be detected and indicates a noise level of the circuit to be detected. The filtering circuit is coupled to the amplifier circuit and arranged to filter the amplified signal and output a filtered signal. The comparing circuit is coupled to the filtering circuit and arranged to compare the filtered signal to a reference voltage and output an output signal indicating the noise level of the circuit to be detected.
Cascode Amplifier Bias Circuits
Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
Cascode Amplifier Bias Circuits
Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
Control method of a minimum power input
A control method of a minimum power input applicable to a wireless power transfer system including a power transmission unit and at least one power receiving unit is provided. The power transmission unit is electrically connected with a control voltage signal and an input voltage signal and accordingly generates the minimum power input. The power transmission unit transmits the minimum power input wirelessly through a wireless transmission to the at least one power receiving unit for receiving. By adjusting the input voltage signal, the duty ratio and resonant frequency of the control voltage signal, the present invention ensures an optimal power transmission efficiency of the wireless power transmission system. Moreover, parameters of a charge pump reservoir and gate driving circuit can be further designed in view of the trend feedback of its gate drive waveforms so as to optimize the effect of the proposed invention.
Amplification circuit with over power protection
An amplification circuit includes a switch circuit, an amplifier, and a control circuit. The switch circuit has a first terminal coupled to a radio frequency signal input terminal or a system voltage terminal, a second terminal coupled to an input terminal of the amplifier, and a control terminal configured to receive a control signal. The amplifier amplifies a radio frequency signal. The control circuit generates the control signal according to a driving current generated by the amplifier. When the control circuit determines that the amplifier operates in a high power mode, the control circuit controls the control signal to adjust a conducting level between the first terminal and the second terminal of the switch circuit according to the intensity of the driving current.