A method for performing predictive maintenance of an amplifier module is described. At least one parameter of at least one amplifier module is acquired via a measurement data acquisition unit. The at least one parameter acquired is analyzed via a measurement data analyzing unit so as to predict the probability and/or time of default of the at least one amplifier module. Further, a system is described.

A method for performing predictive maintenance of an amplifier module is described. At least one parameter of at least one amplifier module is acquired via a measurement data acquisition unit. The at least one parameter acquired is analyzed via a measurement data analyzing unit so as to predict the probability and/or time of default of the at least one amplifier module. Further, a system is described.

A semiconductor device (1) according to the present disclosure includes: an n-channel depletion-mode transistor (10); an input matching circuit inside which the gate terminal (11) and the ground terminal (22) are DC-connected; a self-bias circuit (26) including a resistor (14) biasing the transistor (10) by a voltage drop due to a current flowing through the resistor (14), and a capacitor (15) connected in parallel to the resistor 14) and regarded as short-circuit at a frequency of the high-frequency power; and a diode (31) having an endmost anode connected to the source terminal (12) and an endmost cathode connected to the ground terminal (22), and connected in one stage or connected in series in a plurality of stages in the same direction.

A semiconductor device (1) according to the present disclosure includes: an n-channel depletion-mode transistor (10); an input matching circuit inside which the gate terminal (11) and the ground terminal (22) are DC-connected; a self-bias circuit (26) including a resistor (14) biasing the transistor (10) by a voltage drop due to a current flowing through the resistor (14), and a capacitor (15) connected in parallel to the resistor 14) and regarded as short-circuit at a frequency of the high-frequency power; and a diode (31) having an endmost anode connected to the source terminal (12) and an endmost cathode connected to the ground terminal (22), and connected in one stage or connected in series in a plurality of stages in the same direction.

A high-frequency amplifier includes: a common-source transistor that has gate fingers, drain fingers, and source fingers, amplifies a signal applied to each of the gate fingers as a signal to be amplified, and outputs an amplified signal from each of the drain fingers; a common-gate transistor that has source fingers connected to the drain fingers of the common-source transistor, drain fingers, and gate fingers, and amplifies the amplified signal output from each of the drain fingers of the common-source transistor; a gate bus bar connected to the gate fingers of the common-gate transistor; and capacitors each having a first end connected to the gate bus bar and a second end grounded: wherein the capacitors are arranged at respective positions where impedances obtained by looking toward the respective capacitors from the respective gate fingers of the common-gate transistor are equal to each other.

A high-frequency amplifier includes: a common-source transistor that has gate fingers, drain fingers, and source fingers, amplifies a signal applied to each of the gate fingers as a signal to be amplified, and outputs an amplified signal from each of the drain fingers; a common-gate transistor that has source fingers connected to the drain fingers of the common-source transistor, drain fingers, and gate fingers, and amplifies the amplified signal output from each of the drain fingers of the common-source transistor; a gate bus bar connected to the gate fingers of the common-gate transistor; and capacitors each having a first end connected to the gate bus bar and a second end grounded: wherein the capacitors are arranged at respective positions where impedances obtained by looking toward the respective capacitors from the respective gate fingers of the common-gate transistor are equal to each other.

A class-D RF power amplifier (PA) architecture with duty cycle control has improved power efficiency while suppressing even-order harmonics. An inductor and capacitor (LC) low pass filter (LPF) can also be integrated on-chip to further suppress harmonics and provide impedance transformation between the PA and load. This eases the design for customers and reduce their bill of materials cost. The LPF can also match the PA to the load impedance to improve efficiency. The harmonic levels can also be controlled by adjusting the duty cycle of the PA output.

A class-D RF power amplifier (PA) architecture with duty cycle control has improved power efficiency while suppressing even-order harmonics. An inductor and capacitor (LC) low pass filter (LPF) can also be integrated on-chip to further suppress harmonics and provide impedance transformation between the PA and load. This eases the design for customers and reduce their bill of materials cost. The LPF can also match the PA to the load impedance to improve efficiency. The harmonic levels can also be controlled by adjusting the duty cycle of the PA output.

A receiver includes an amplification block supporting carrier aggregation (CA). The amplification block includes a first amplifier circuit configured to receive a radio frequency (RF) input signal at a block node from an outside source, amplify the RF input signal, and output the amplified RF input signal as a first RF output signal. The first amplifier circuit includes a first amplifier configured to receive the RF input signal through a first input node to amplify the RF input signal, and a first feedback circuit coupled between the first input node and a first internal amplification node of the first amplifier to provide feedback to the first amplifier.

Techniques are disclosed to allow for a switched capacitor digital power amplifier (PA) that operates using high supply voltage levels beyond twice the maximum voltage rating for any of the transistor terminals such as Vds/Vdg/Vsg.