A noise detecting circuit including an amplifier circuit, a filtering circuit and a comparing circuit. The amplifier circuit is arranged to amplify an input signal and output an amplified signal, wherein the input signal is received from a circuit to be detected and indicates a noise level of the circuit to be detected. The filtering circuit is coupled to the amplifier circuit and arranged to filter the amplified signal and output a filtered signal. The comparing circuit is coupled to the filtering circuit and arranged to compare the filtered signal to a reference voltage and output an output signal indicating the noise level of the circuit to be detected.

A power supply circuitry includes a first circuitry, a second circuitry, a fourth circuitry, and a fifth circuitry. The first circuitry outputs a first current based on a drive signal. The second circuitry generates a second current according to the first current. The fourth circuitry generates the drive signal based on a first voltage according to the first current. The fifth circuitry outputs a second voltage based on the first current and on the second current.

A power supply circuitry includes a first circuitry, a second circuitry, a fourth circuitry, and a fifth circuitry. The first circuitry outputs a first current based on a drive signal. The second circuitry generates a second current according to the first current. The fourth circuitry generates the drive signal based on a first voltage according to the first current. The fifth circuitry outputs a second voltage based on the first current and on the second current.

A low noise amplifier circuit includes an input stage circuit, a first output stage circuit, and a second output stage circuit. The input stage circuit is configured to receive an input signal and to generate a bias signal. The first output stage circuit corresponding to a first wireless communication and is configured to be biased according to the bias signal and a first control signal, in order to generate a first output signal, in which the first control signal is for setting a first gain of the first output stage circuit. The second output stage circuit corresponding to a second wireless communication and is configured to be biased according to the bias signal and a second control signal, in order to generate a second output signal, in which the second control signal is for setting a second gain of the second output stage circuit.

An amplifier circuit is disclosed. The amplifier circuit includes an input terminal configured to receive an input signal, an output terminal configured to transmit an output signal, and a first signal path including a first amplifying circuit, where the first amplifying circuit is configured to receive the input signal and to transmit a first amplified output to the output terminal, and where the first amplified output includes first amplifier circuit harmonic noise. The amplifier circuit also includes a second signal path including a second amplifying circuit, where the second amplifying circuit receives the input signal and transmits a second amplified output to the output terminal, and where the second amplified output includes second amplifier circuit harmonic noise. The output signal includes the first and second amplified outputs, and the first amplifying circuit harmonic noise is at least partially canceled by the second amplifying circuit harmonic noise in the output signal.

Embodiments of active baluns are disclosed. In an embodiment, an active balun includes input terminals configured to receive a single-ended input signal and a linear redriver configured to transform the single-ended input signal into a differential output signal.

Embodiments of active baluns are disclosed. In an embodiment, an active balun includes input terminals configured to receive a single-ended input signal and a linear redriver configured to transform the single-ended input signal into a differential output signal.

Disclosed in a CASCODE device in which multiple transistors are stacked in a vertical direction and connected in series. The CASCODE device exhibits improvements in device/circuit intrinsic gain (GmRo) that is a performance index for analog/RF applications, cutoff frequency (Ft), and maximum oscillation frequency (Fmax). A method of manufacturing the CASCODE device is also disclosed.

Aspects of the present disclosure relate to a receiver including an amplifier circuit. The amplifier circuit includes a common-source amplifier having an input and an output, and a common-gate amplifier having an input and an output, wherein the input of the common-gate amplifier is coupled to the output of the common-source amplifier. The receiver also includes a first receive chain coupled to the output of the common-gate amplifier, and a second receive chain coupled to the output of the common-source amplifier.

Techniques for controlling a low-profile medium wave transmitting system are provided. An example of an antenna system according to the disclosure includes a first radiator operably coupled to a first amplifier, a first modulator operably coupled to the first amplifier and configured to provide a first radio frequency signal to the first amplifier, a second radiator operably coupled to a second amplifier, a second modulator operably coupled to the second amplifier and configured to provide a second radio frequency signal to the second amplifier, a control module operably coupled to the first modulator, first amplifier, the second modulator, and the second amplifier, the control module being configured to control a delta phase value based on the first radio frequency signal and the second radio frequency signal, and control the power output of the first amplifier and the second amplifier.