A power amplifier, such as a radio-frequency (RF) Doherty power amplifier, for amplifying an input signal to an output signal is disclosed. The power amplifier includes a peaking amplifier circuit, where the peaking amplifier circuit is formed in gallium nitride materials on a silicon substrate. The power amplifier further includes a main amplifier circuit, where the main amplifier circuit is formed in gallium nitride materials on a silicon carbide substrate.

A power amplifier, such as a radio-frequency (RF) Doherty power amplifier, for amplifying an input signal to an output signal is disclosed. The power amplifier includes a peaking amplifier circuit, where the peaking amplifier circuit is formed in gallium nitride materials on a silicon substrate. The power amplifier further includes a main amplifier circuit, where the main amplifier circuit is formed in gallium nitride materials on a silicon carbide substrate.

A receiver circuit includes an analog front end and a non-linear equalizer. The analog front end including a super source follower (SSF) amplifier having a first input terminal adapted to couple to a transmission line to receive an input signal referenced to a first voltage level, a second input adapted to receive a reference voltage, and first and second output terminals adapted to provide an amplified signal referenced to a second voltage level. The non-linear equalizer coupled to receive an output signal of the analog front end and compensate for inter-symbol interference at a data rate of at least 14 Gbps. The SSF amplifier includes transistors having relative sizes selected to provide a frequency response of the SSF amplifier with a peak at a frequency approximately ⅔ of the data rate.

An amplifying circuit and a rectifying antenna are provided. The amplifying circuit includes: a first rectifying circuit, configured to output a first direct current signal according to a first alternating current signal; a second rectifying circuit, configured to output a second direct current signal according to a second alternating current signal; a differential amplifying circuit, configured to receive the first direct current signal and the second direct current signal, amplify a difference between the first direct current signal and the second direct current signal, and output an amplified difference between the first direction current signal and the second direct current, the first direct current signal and the second direct current signal have directions opposite to each other.

An amplifying circuit and a rectifying antenna are provided. The amplifying circuit includes: a first rectifying circuit, configured to output a first direct current signal according to a first alternating current signal; a second rectifying circuit, configured to output a second direct current signal according to a second alternating current signal; a differential amplifying circuit, configured to receive the first direct current signal and the second direct current signal, amplify a difference between the first direct current signal and the second direct current signal, and output an amplified difference between the first direction current signal and the second direct current, the first direct current signal and the second direct current signal have directions opposite to each other.

A high frequency amplifier circuit includes an input terminal and an output terminal, transmission power amplifiers (11L, 11H) that amplify a high frequency signal in first and second frequency bands, each of which is a part of a communication band, at equal to or higher than a prescribed amplification factor, respectively, switches (21, 31) that exclusively switch connection between the input terminal, the transmission power amplifier (11L), and the output terminal, and connection between the input terminal, the transmission power amplifier (11H), and the output terminal, and a transmission filter that is connected between the output terminal and the switch (31) and has a communication band as a pass band, the first frequency band including a frequency band other than the second frequency band, the second frequency band including a frequency band other than the first frequency band.

The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a data transmission rate higher than that of a 4th generation (4G) communication system such as long term evolution (LTE). The present disclosure is to amplify transmission signals in a wireless communication system, and a transmitting device may include an antenna array including a plurality of antenna elements, a plurality of amplification chains for amplifying signals transmitted through the plurality of the antenna elements, and a power supply line for supplying powers to the plurality of the amplification chains. Herein, the powers used by power amplifiers included in at least one amplification chain of the plurality of the amplification chains may be divided by filtering or by independent pads and branch-lines.

A power amplification device includes: a first semiconductor chip including a first main surface and a second main surface; a first field-effect transistor, a first drain finger part, a plurality of first gate finger parts, and a source finger part; a sub-mount substrate including a third main surface and a fourth main surface; and a first filled via provided penetrating from the third main surface to the fourth main surface. In plan view, the first filled via has a rectangular shape. A long side direction of the first filled via is parallel to a long side direction of the plurality of first gate finger parts. In plan view, the first filled via is positioned to overlap part of one first gate finger part included in the plurality of first gate finger parts.

A power amplification device includes: a first semiconductor chip including a first main surface and a second main surface; a first field-effect transistor, a first drain finger part, a plurality of first gate finger parts, and a source finger part; a sub-mount substrate including a third main surface and a fourth main surface; and a first filled via provided penetrating from the third main surface to the fourth main surface. In plan view, the first filled via has a rectangular shape. A long side direction of the first filled via is parallel to a long side direction of the plurality of first gate finger parts. In plan view, the first filled via is positioned to overlap part of one first gate finger part included in the plurality of first gate finger parts.

A balanced-to-Doherty (B2D) mode-reconfigurable power amplifier (PA) has the capability of maintaining high linearity and high efficiency against load mismatch. The reconfigurable PA includes a switch to alternatively connect to a pre-determined resistive load or a pre-determined pure reactive load (jX), i.e., short, open, or finite reactance between an output quadrature coupler and ground. The biasing of Doherty mode is adaptive dependent on the value of reactive loading (jX). The Doherty operation of this PA is based on an architecture configured from a balanced amplifier, e.g., a quasi-balanced amplifier.