A balanced-to-Doherty (B2D) mode-reconfigurable power amplifier (PA) has the capability of maintaining high linearity and high efficiency against load mismatch. The reconfigurable PA includes a switch to alternatively connect to a pre-determined resistive load or a pre-determined pure reactive load (jX), i.e., short, open, or finite reactance between an output quadrature coupler and ground. The biasing of Doherty mode is adaptive dependent on the value of reactive loading (jX). The Doherty operation of this PA is based on an architecture configured from a balanced amplifier, e.g., a quasi-balanced amplifier.

A multiplexer includes a first acoustic wave filter, a second acoustic wave filter, and an inductor-capacitor (LC) filter each connected to a common terminal. A passband of the second acoustic wave filter is between a passband of the first acoustic wave filter and a passband of the LC filter, a frequency gap between the passband of the second acoustic wave filter and the passband of the LC filter is greater than a frequency gap between the passband of the first acoustic wave filter and the passband of the second acoustic wave filter, the passband of the first acoustic wave filter includes a transmission band of the first communication band, the passband of the LC filter includes a reception band of the first communication band, and the passband of the second acoustic wave filter includes a reception band of a second communication band.

Subsystems and methods disclosed herein provide a reference signal to a power amplifier (PA) of an RF transmitter or transceiver. PTAT and CTAT signals and a temperature indication signal are produced. Based on the temperature indication signal, one of the PTAT or CTAT signals is selected to be used to produce one or more DAC reference signals. Using the selected one of the PTAT or CTAT signals, the one or more DAC reference signals are produced and used to bias the DAC. A multi-bit digital input signal is converted to an analog output signal using the DAC that is biased using the one or more DAC reference signals (produced using the selected one of the PTAT or CTAT signals). Further, the analog signal output by the DAC, or an amplified version thereof, is used as the reference signal that is provided to the PA of the RF transmitter or transceiver.

Subsystems and methods disclosed herein provide a reference signal to a power amplifier (PA) of an RF transmitter or transceiver. PTAT and CTAT signals and a temperature indication signal are produced. Based on the temperature indication signal, one of the PTAT or CTAT signals is selected to be used to produce one or more DAC reference signals. Using the selected one of the PTAT or CTAT signals, the one or more DAC reference signals are produced and used to bias the DAC. A multi-bit digital input signal is converted to an analog output signal using the DAC that is biased using the one or more DAC reference signals (produced using the selected one of the PTAT or CTAT signals). Further, the analog signal output by the DAC, or an amplified version thereof, is used as the reference signal that is provided to the PA of the RF transmitter or transceiver.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

Provided is a transversal radio frequency filter circuit having a low noise amplifier connected along an input signal path, a first power divider connected between the low noise amplifier and four single taps, and an output path connected to the outputs of each of the four single taps. Each of the four single taps having a coefficient control mechanism, a polarity selection mechanism, and a time delay element. The coefficient control mechanism can include a wideband digital step attenuator configured to support high control range of the coefficient. Additionally, the circuit can include a second power divider connected between the outputs of each of the four single taps and the output path. The circuit can further include a field-programmable gate array configured to control coefficient control mechanisms, the polarity selection mechanisms, and the time delay elements.

An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

An output matching circuit includes: a converter electrically connected to an output end of a power amplifier element to convert an impedance of the output end to an impedance higher than the impedance of the output end by magnetic coupling; and a first filter circuit electrically connected between the output end of the power amplifier element and the converter to make a short circuit in a frequency band different from a predetermined transmission frequency band.