A radio-frequency circuit includes an amplifier circuit, a bias circuit, a bias control circuit, a comparing section, a signal input terminal, an antenna terminal, an attenuation circuit, and a control unit. The amplifier circuit includes a specific transistor. The bias circuit supplies a bias current or a bias voltage to the input terminal of the specific transistor. The bias control circuit supplies a control current or a control voltage to the bias circuit. The comparing section compares a threshold voltage with a power supply voltage of a power supply terminal connected to the output terminal of the specific transistor. The attenuation circuit is connected in a signal path between the signal input terminal and the antenna terminal and is capable of attenuating the radio-frequency signal. The control unit changes an attenuation of the attenuation circuit in accordance with a compared result of the comparing section.

Systems and methods for amplifying a signal is described. A circuit may convert an input radio frequency (RF) signal into a first RF signal with power level matching a power capacity of a first transistor of a first size in a carrier amplifier stage, a second RF signal with power level matching a power capacity of a second transistor of the first size in a peaking amplifier stage, and a third RF signal with third power level matching a power capacity of a third transistor of a second size in another peaking amplifier stage. The circuit may amplify the first, second, and third RF signals to generate first, second, and third amplified RF signals, respectively. The circuit may combine the first, second, and third amplified RF signals, into an output RF signal that is an amplified version of the input RF signal.

Systems and methods for amplifying a signal is described. A circuit may convert an input radio frequency (RF) signal into a first RF signal with power level matching a power capacity of a first transistor of a first size in a carrier amplifier stage, a second RF signal with power level matching a power capacity of a second transistor of the first size in a peaking amplifier stage, and a third RF signal with third power level matching a power capacity of a third transistor of a second size in another peaking amplifier stage. The circuit may amplify the first, second, and third RF signals to generate first, second, and third amplified RF signals, respectively. The circuit may combine the first, second, and third amplified RF signals, into an output RF signal that is an amplified version of the input RF signal.

A power amplifier structure includes at least one power amplifier circuit. The power amplifier circuit includes a transistor of a first type connected in series with a transistor of a second type connected between the same voltage supply. In a non-limiting nonexclusive example, an n-type transistor is connected in series with a p-type transistor connected between Vdd. The power amplifier structure can include two amplifier circuits configured in a differential amplifier structure. The differential amplifier structure includes two amplifier circuits operably connected in parallel between the same voltage supply.

An output matching circuit includes a transformer having one end electrically connected to an output terminal of a power amplifier element that amplifies an input signal and another end electrically connected to a terminal connected to a load, and converting an impedance of the terminal connected to the load to an impedance higher than an impedance of the output terminal, a first filter circuit that attenuates a signal within a first frequency band higher than a transmission frequency band of the input signal, and a second filter circuit that attenuates a signal within a second frequency band higher than the first frequency band.

An output matching circuit includes a transformer having one end electrically connected to an output terminal of a power amplifier element that amplifies an input signal and another end electrically connected to a terminal connected to a load, and converting an impedance of the terminal connected to the load to an impedance higher than an impedance of the output terminal, a first filter circuit that attenuates a signal within a first frequency band higher than a transmission frequency band of the input signal, and a second filter circuit that attenuates a signal within a second frequency band higher than the first frequency band.

Disclosed herein are methods for use in operating signal amplifiers that provide impedance adjustments for different gain modes. The impedance adjustments are configured to result in a constant real impedance for an input signal at the amplifier. Some of the disclosed methods adjust impedance using switchable inductors to compensate for changes in impedance with changing gain modes. Some of the disclosed methods adjust a device size to compensate for changes in impedance with changing gain modes. By providing impedance adjustments, the amplifiers reduce losses and improve performance by improving impedance matching over a range of gain modes.

Disclosed herein are methods for use in operating signal amplifiers that provide impedance adjustments for different gain modes. The impedance adjustments are configured to result in a constant real impedance for an input signal at the amplifier. Some of the disclosed methods adjust impedance using switchable inductors to compensate for changes in impedance with changing gain modes. Some of the disclosed methods adjust a device size to compensate for changes in impedance with changing gain modes. By providing impedance adjustments, the amplifiers reduce losses and improve performance by improving impedance matching over a range of gain modes.

Radio frequency systems and methods adjust power amplifier operation based on power amplifier operating mode or power level to achieve a tradeoff between improved linearity at lower power levels and improved out of band noise performance and coexistence at higher power levels.

Radio frequency systems and methods adjust power amplifier operation based on power amplifier operating mode or power level to achieve a tradeoff between improved linearity at lower power levels and improved out of band noise performance and coexistence at higher power levels.