Patent classifications
H03F3/195
Semiconductor device and power amplifier module
A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.
HIGH-FREQUENCY MODULE AND COMMUNICATION APPARATUS
In a high-frequency module, a plurality of filters are connected to a first switch. A plurality of amplifiers are connected to a second switch. A first inductor is disposed on a common path between a second common terminal of the second switch and a first common terminal of the first switch. A plurality of second inductors are disposed, on a one-to-one correspondence, in sections different from the common path, the sections being included in the plurality of respective signal paths. The first inductor is a surface mount inductor located on a first main surface of a mounting substrate. The plurality of second inductors are each an inductor disposed within an IC chip including the plurality of amplifiers or an inductor including a conductive pattern formed in or on the mounting substrate.
Radio frequency power amplifier and device
A radio frequency power amplifier and a device are disclosed. A first microstrip line and a second microstrip line are coupled, one end of the second microstrip line is an open stub and another end of the second microstrip line is grounded; and the first microstrip line having a first width is connected to a first transmission line having a second width which is wider than the first width. Therefore, some harmonic bands suppression can be implemented independently. Furthermore, the harmonic termination is independent and may not impact one or more fundamental components during matching a network. In addition, it may not take up more space and is sufficiently compact. Furthermore, sufficient wide harmonic response bandwidth can be provided.
HIGH VOLTAGE STACKED TRANSISTOR AMPLIFIER
Various aspects of integrated amplifiers, layouts for the integrated amplifiers, and packaged arrangements of the amplifiers are described. In one example, an amplifier includes an amplifier cell, and a biasing network coupled to the common gate transistor in the amplifier cell. The amplifier cell includes a common source transistor and a common gate transistor in a cascode arrangement, where at least one of the common source transistor and the common gate transistor comprises a field plate. Among other advantages, the amplifiers described herein can be biased with relatively high voltages and still operate like a single a common source transistor, without sacrificing reliability, performance, or requiring additional off-chip components, such as biasing networks of resistors and inductors.
HIGH VOLTAGE STACKED TRANSISTOR AMPLIFIER
Various aspects of integrated amplifiers, layouts for the integrated amplifiers, and packaged arrangements of the amplifiers are described. In one example, an amplifier includes an amplifier cell, and a biasing network coupled to the common gate transistor in the amplifier cell. The amplifier cell includes a common source transistor and a common gate transistor in a cascode arrangement, where at least one of the common source transistor and the common gate transistor comprises a field plate. Among other advantages, the amplifiers described herein can be biased with relatively high voltages and still operate like a single a common source transistor, without sacrificing reliability, performance, or requiring additional off-chip components, such as biasing networks of resistors and inductors.
Radio frequency circuit, method of transmitting and receiving radio frequency signal, and wireless communication device
Disclosed is a radio frequency circuit, a method of transmitting and receiving radio frequency signals, and a wireless communication device. The radio frequency circuit includes a first radio frequency amplifier, a second radio frequency amplifier, a first channel switch, a first low noise amplifier, a second low noise amplifier, and a second channel switch; the first radio frequency amplifier and the second radio frequency amplifier are connected with a plurality of antennas through the first channel switch, respectively, and are connected with a plurality of SRS antennas through an SRS switch in the first channel switch; the first low noise amplifier and the second low noise amplifier are connected with the plurality of antennas through the first channel switch, respectively, and are connected with a receiver through the second channel switch, respectively; wherein, the first radio frequency amplifier or the second radio frequency amplifier transmits one channel of radio frequency transmission signals to realize one-channel transmission, and the first low noise amplifier and the second low noise amplifier simultaneously receive radio frequency reception signals to realize two-channel reception.
Apparatus and methods for true power detection
Apparatus and methods for true power detection are provided herein. In certain embodiments, a power amplifier system includes an antenna, a directional coupler, and a power amplifier electrically connected to the antenna by way of a through line of the directional coupler. The power amplifier system further includes a first switch, a second switch, and a combiner that combines a first coupled signal received from a first end of the directional coupler's coupled line through the first switch and a second coupled signal received from a second end of the directional coupler's coupled line through the second switch.
Wideband power amplifier arrangement
A power amplifier arrangement (200) for amplifying an input signal to produce an output signal comprises a plurality N of amplifier sections (212, 213), a first input transmission line (221) comprising multiple segments and a first output transmission line (231) comprising multiple segments. Each amplifier section comprises one or more first transistors (T1) distributed along the first input transmission line (221) and the first output transmission line (231). Each amplifier section is configured to amplify a portion of the input signal to produce a portion of the output signal. A portion of the input signal is one of N portions of the input signal partitioned on any one or a combination of an amplitude basis and a time basis. The output signal is produced at an end of the first output transmission line (231) by building up N potions of the output signal from each amplifier section.
Wideband power amplifier arrangement
A power amplifier arrangement (200) for amplifying an input signal to produce an output signal comprises a plurality N of amplifier sections (212, 213), a first input transmission line (221) comprising multiple segments and a first output transmission line (231) comprising multiple segments. Each amplifier section comprises one or more first transistors (T1) distributed along the first input transmission line (221) and the first output transmission line (231). Each amplifier section is configured to amplify a portion of the input signal to produce a portion of the output signal. A portion of the input signal is one of N portions of the input signal partitioned on any one or a combination of an amplitude basis and a time basis. The output signal is produced at an end of the first output transmission line (231) by building up N potions of the output signal from each amplifier section.
INTEGRATED CIRCUIT AMPLIFIER AND THERMAL PROTECTION CIRCUITRY
Disclosed is an integrated circuit amplifier having a power transistor with a signal/bias input terminal, a first high current terminal, and a second high current terminal, and thermal protection circuitry with a sensor transistor having a sensor control terminal, a sensor output terminal, and a sensor current terminal coupled to a fixed voltage node. Sensor bias circuitry includes a sensor bias terminal coupled to the sensor control terminal, wherein the sensor bias circuitry is configured to generate a temperature set point at which a sensor output voltage at the sensor output terminal drops at least 50% when the temperature of the sensor transistor is above the temperature set point. Shutdown circuitry coupled between the sensor output terminal and the signal/bias input terminal is configured to reduce a bias signal at the signal/bias terminal in response to the at least 50% drop in sensor output voltage.