A semiconductor chip has a first transistor that amplifies a first signal and outputs a second signal, a second transistor that amplifies the second signal and outputs a third signal, and a semiconductor substrate having a main surface parallel to a plane defined by first and second directions and which has the first and second transistors formed thereon. The main surface has thereon a first bump connected to a collector or drain of the first transistor, a second bump connected to an emitter or source of the first transistor, a third bump connected to a collector or drain of the second transistor, and a fourth bump connected to an emitter or source of the second transistor. The first bump is circular, the second through fourth bumps are rectangular or oval, and the area of each of the second through fourth bumps is larger than that of the first bump.

An RF power amplifier circuit includes a power divider, multiple power amplification circuits and a power combiner that cooperatively perform power amplification on an RF input signal so as to output an RF output signal, and an impedance conversion circuit that has a circuit terminal coupled to one of the power divider and the power combiner which has a microstrip structure, and that is configured such that a conversion impedance, which is an impedance seen into the impedance conversion circuit from the circuit terminal, matches an impedance seen into the power divider or the power combiner from the circuit terminal. The microstrip structure has a physical length associated with the conversion impedance.

An RF power amplifier circuit includes a power divider, multiple power amplification circuits and a power combiner that cooperatively perform power amplification on an RF input signal so as to output an RF output signal, and an impedance conversion circuit that has a circuit terminal coupled to one of the power divider and the power combiner which has a microstrip structure, and that is configured such that a conversion impedance, which is an impedance seen into the impedance conversion circuit from the circuit terminal, matches an impedance seen into the power divider or the power combiner from the circuit terminal. The microstrip structure has a physical length associated with the conversion impedance.

An electronic device is provided The electronic device includes a patch antenna element, at least one antenna including a first feeding unit electrically connected to the patch antenna element and a second feeding unit electrically connected to the patch antenna element so as to have a designated isolation for a signal that is input to the first feeding unit, a radio frequency integrated circuit (RFIC) which includes a first communication circuit including a first transmission circuit and a first reception circuit which are electrically connected to the first feeding unit, and a second communication circuit including a second transmission circuit and a second reception circuit which are electrically connected to the second feeding unit, and a processor.

An electronic device is provided The electronic device includes a patch antenna element, at least one antenna including a first feeding unit electrically connected to the patch antenna element and a second feeding unit electrically connected to the patch antenna element so as to have a designated isolation for a signal that is input to the first feeding unit, a radio frequency integrated circuit (RFIC) which includes a first communication circuit including a first transmission circuit and a first reception circuit which are electrically connected to the first feeding unit, and a second communication circuit including a second transmission circuit and a second reception circuit which are electrically connected to the second feeding unit, and a processor.

Envelope tracking systems with modeling for power amplifier supply voltage filtering are provided herein. In certain embodiments, an envelope tracking system includes a supply voltage filter, a power amplifier that receives a power amplifier supply voltage through the supply voltage filter, and an envelope tracker that generates the power amplifier supply voltage. The power amplifier provides amplification to a radio frequency (RF) signal that is generated based on digital signal data, and the envelope tracker generates the power amplifier supply voltage based on an envelope signal corresponding to an envelope of the RF signal. The envelope tracking system further includes digital modeling circuitry that models the supply voltage filter and operates to digitally compensate the digital signal data for effects of the supply voltage filter, such as distortion.

Envelope tracking systems with modeling for power amplifier supply voltage filtering are provided herein. In certain embodiments, an envelope tracking system includes a supply voltage filter, a power amplifier that receives a power amplifier supply voltage through the supply voltage filter, and an envelope tracker that generates the power amplifier supply voltage. The power amplifier provides amplification to a radio frequency (RF) signal that is generated based on digital signal data, and the envelope tracker generates the power amplifier supply voltage based on an envelope signal corresponding to an envelope of the RF signal. The envelope tracking system further includes digital modeling circuitry that models the supply voltage filter and operates to digitally compensate the digital signal data for effects of the supply voltage filter, such as distortion.

A power amplifier circuit includes a substrate and a semiconductor chip disposed on or above the substrate. The semiconductor chip includes a power amplifier unit that amplifies an RF signal, a ground terminal to which a ground of the power amplifier unit is coupled, and a first circuit element having a first end electrically coupled to the ground terminal without any portion outside the semiconductor chip interposed therebetween, and having a second end. The substrate includes a second circuit element having a first end electrically coupled to an output of the power amplifier unit and a second end electrically coupled to the second end of the first circuit element. The first and second circuit elements constitute a harmonic wave termination circuit. The harmonic wave termination circuit reflects, to the power amplifier unit, a harmonic wave component of the amplified RF signal output from the power amplifier unit.

A circuit (e.g., implemented as part of a controller area network (CAN) bus receiver includes a pre-amplifier stage having first and second outputs. The circuit also includes a comparator having first and second inputs. The first input is coupled to the first output of the pre-amplifier stage, and the second input is coupled to the second output of the pre-amplifier stage. The comparator includes an input differential transistor pair, a second pair of transistors coupled to the input differential transistor pair in a cascode configuration, and a push-pull output stage coupled to the second pair of transistors.

A power amplifier circuit includes a first transistor configured to receive a first signal at a base, amplify the first signal, and output a second signal from a collector; and a bias circuit configured to supply a bias current to the base of the first transistor. The bias circuit includes a second transistor configured to supply a bias current to the base of the first transistor, a third transistor including a base connected to a base of the second transistor and a collector connected to a collector of the second transistor, and a fourth transistor including a base connected to an emitter of the third transistor and a collector connected to an emitter of the second transistor and configured to draw at least part of the bias current.