A low frequency loss correction circuit that improves the efficiency of a power amplifier at near-DC low frequencies The low frequency loss correction circuit can include a signal error detection circuit configured to produce an error signal in response to detecting one or more frequency components of a tracking signal below a cutoff frequency that are substantially attenuated through a capacitive path. The low frequency loss correction circuit can include a drive circuit configured to convert the error signal into a low frequency correction signal, and provide the low frequency correction signal to a voltage supply line, the low frequency correction signal including at least some of the one or more frequency components of the tracking signal below a cutoff frequency that are substantially attenuated through the capacitive path.

Switchable base feed circuit for radio-frequency (RF) power amplifiers. In some embodiments, an RF power amplifier (PA) circuit can include a transistor having a base, a collector, and an emitter, with the transistor being configured to amplify an RF signal. The PA circuit can further include a bias circuit configured to provide a base bias signal to the base of the transistor. The PA circuit can further include a switchable base feed circuit implemented between the bias circuit and the base of the transistor. The switchable base feed circuit can be configured to provide a plurality of different resistance values for the base bias signal between the bias circuit and the base of the transistor. Such a PA circuit can be implemented in products such as a die, a module, and a wireless device.

Switchable base feed circuit for radio-frequency (RF) power amplifiers. In some embodiments, an RF power amplifier (PA) circuit can include a transistor having a base, a collector, and an emitter, with the transistor being configured to amplify an RF signal. The PA circuit can further include a bias circuit configured to provide a base bias signal to the base of the transistor. The PA circuit can further include a switchable base feed circuit implemented between the bias circuit and the base of the transistor. The switchable base feed circuit can be configured to provide a plurality of different resistance values for the base bias signal between the bias circuit and the base of the transistor. Such a PA circuit can be implemented in products such as a die, a module, and a wireless device.

An active electronically scanned array (AESA) includes a plurality of power amplifiers including first power amplifiers and second power amplifiers. The first power amplifiers are biased by a first drain voltage. The second power amplifiers are biased by a second drain voltage. The second drain voltage is different from the first drain voltage.

An integrative software radio embodies a single multi-radio device including functionalities that are a superset of a plurality of individual discrete radio devices includes a radio frequency transmitter that integrates transmission capabilities of a plurality of discrete transmitters such that the radio frequency transmitter is configured to generate a first amalgamated waveform that is a combination of individual waveforms, each individual waveform corresponding to the transmission capabilities of its respective one of the plurality of discrete transmitters, wherein the transmission capabilities each of the plurality of discrete transmitters comprise operating characteristics different from one or more of the other discrete transmitters, wherein a waveform of a discrete transmitter comprises an adjustable electromagnetic wavefront and a proprietary waveform generation component; and a mission module communicatively coupled to the plurality of discrete transmitters and configured to alter the wavefront of at least one of the plurality of discrete transmitters to reduce interference among the at least one of the plurality of discrete transmitters without adjusting the proprietary waveform generation component.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

A predistortion circuit for a wireless transmitter includes a signal input configured to receive a baseband signal. Further, the predistortion circuit includes a predistorter configured to generate a predistorted baseband signal using the baseband signal and a select of one of a first predistorter configuration and a second predistorter configuration.

To provide a high-frequency circuit and a communication device by which a harmonic component in differential amplification can be attenuated. The high-frequency circuit includes a differential amplifier circuit. The differential amplifier circuit includes a first amplifying element, a second amplifying element, first wiring, second wiring, and a series circuit. The first amplifying element includes a first input terminal and a first output terminal. The second amplifying element includes a second input terminal and a second output terminal. The first wiring is connected to the first output terminal. The second wiring is connected to the second output terminal. The series circuit is connected between the first wiring and the second wiring. The series circuit includes a first inductor, a second inductor, and a capacitor.

A broadband power amplifier device includes an input matching network including first, second and third inductors, a driver amplifier, and first, second and third frequency modulators. First inductor has one end connected to output of a mixer and the other end connected to one end of the first frequency modulator, with the other end of the first frequency modulator being grounded. The second inductor has one end connected to one end of first inductor and the other end connected to input of driver amplifier, with second frequency modulator being connected across second inductor. Third inductor has one end connected to output of driver amplifier and the other end connected to input of power amplifier, with third frequency modulator being connected across third inductor. Bandwidth of power amplifier device can be extended and area and current consumption thereof can be reduced, while power can be improved without large LO driver.