According to the present invention, an integrated circuit includes a first amplifier stage, a second amplifier stage, a first signal line connecting an output of the first amplifier stage and an input of the second amplifier stage to each other, a first plane for ground connected to the first amplifier stage, a second plane for ground connected to the second amplifier stage and at least one at least one line for ground connecting the first plane and the second plane to each other, wherein the at least one line has a center line having a length of 10 μm to 1 mm, a width of the at least one line is ⅓ or less of a width of the first plane, and a pattern ratio is 1 or more.

According to the present invention, an integrated circuit includes a first amplifier stage, a second amplifier stage, a first signal line connecting an output of the first amplifier stage and an input of the second amplifier stage to each other, a first plane for ground connected to the first amplifier stage, a second plane for ground connected to the second amplifier stage and at least one at least one line for ground connecting the first plane and the second plane to each other, wherein the at least one line has a center line having a length of 10 μm to 1 mm, a width of the at least one line is ⅓ or less of a width of the first plane, and a pattern ratio is 1 or more.

Each of cells arranged on a substrate surface along a first direction includes at least one unit transistor. Collector electrodes are arranged between two adjacent cells. A first cell, which is at least one of the cells, includes unit transistors arranged along the first direction. The unit transistors are connected in parallel to each another. In the first cell, the base electrode and the emitter electrode in each unit transistor are arranged along the first direction, and the order of arrangement of the base electrode and the emitter electrode is the same among the unit transistors. When looking at one first cell, a maximum value of distances in the first direction between the emitter electrodes of two adjacent unit transistors in the first cell being looked at is shorter than ½ of a shorter one of distances between the first cell being looked at and adjacent cells.

A power amplifier including: a main power amplification device having an output; an auxiliary power amplification device having an output; a load modulation circuit operably connected to the output of the main power amplification device and the output of the auxiliary power amplification device; and a post-matching circuit operably connected to load modulation circuit. The load modulation circuit is arranged to enable fundamental frequency load modulation and to enable modulated harmonic terminations of at least the second and third harmonic frequencies. The modulated harmonic terminations may include drain terminations.

Methods and devices are described for compensating an effect of aging due to, for example, hot carrier injection, or other device degradation mechanisms affecting a current flow, in an RF amplifier. In one case a replica circuit is used to sense the aging of the RF amplifier and adjust a biasing of the RF amplifier accordingly.

Methods and devices are described for compensating an effect of aging due to, for example, hot carrier injection, or other device degradation mechanisms affecting a current flow, in an RF amplifier. In one case a replica circuit is used to sense the aging of the RF amplifier and adjust a biasing of the RF amplifier accordingly.

An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

The embodiments described herein provide an amplifier device that utilizes bonding pad capacitance in an impedance matching network. In one specific embodiment, the amplifier device comprises: an amplifier formed on a semiconductor die, the amplifier including an amplifier input and an amplifier output, the amplifier configured to generate an amplified radio frequency (RF) signal at the amplifier output; and an impedance matching network coupled to the amplifier, the impedance matching network including a capacitor, where the capacitor includes a first plate, a second plate, and dielectric material between the first and second plates, where the first plate includes or is directly electrically coupled to a bond pad on the semiconductor die.

The embodiments described herein provide an amplifier device that utilizes bonding pad capacitance in an impedance matching network. In one specific embodiment, the amplifier device comprises: an amplifier formed on a semiconductor die, the amplifier including an amplifier input and an amplifier output, the amplifier configured to generate an amplified radio frequency (RF) signal at the amplifier output; and an impedance matching network coupled to the amplifier, the impedance matching network including a capacitor, where the capacitor includes a first plate, a second plate, and dielectric material between the first and second plates, where the first plate includes or is directly electrically coupled to a bond pad on the semiconductor die.