H03F3/211

Phase tuning for monolithic microwave integrated circuits
10707819 · 2020-07-07 · ·

Monolithic microwave integrated circuits (MMICs) with phase tuning are disclosed. A MMIC structure may include a MMIC amplifier with electrically coupled input and output lines. The MMIC structure may further include an adjustable cover over the MMIC amplifier that includes at least one portion that can be adjusted closer to or farther away from either the input or output lines. In this manner, a signal capacitance between the adjustable cover and the input or output lines is adjustable, and accordingly, a signal phase of the MMIC structure may be tuned. A spatial power-combining device may include a plurality of amplifier assemblies, wherein each amplifier assembly includes a MMIC amplifier with an adjustable cover. In this manner, the plurality of amplifier assemblies may be phase-tuned to a target value.

Power amplifying apparatus with asymmetrical amplification structure and linearity

A power amplifying apparatus includes a first bias circuit that generates a first bias current having a first magnitude, a first amplification circuit connected between a first node and a second node, and that receives the first bias current, amplifies a signal input through the first node, and outputs a first amplified signal to the second node, a second bias circuit that generates a second bias current having a second magnitude that is different from the first magnitude of the first bias current, and a second amplification circuit connected in parallel with the first amplification circuit between the first node and the second node, and that receives the second bias current, amplifies the signal input through the first node, and outputs a second amplified signal to the second node, wherein the second amplification circuit may have a size that is different from a size of the first amplification circuit.

Receiver circuit and operation method

A receiver circuit includes a first amplifier circuit, a second amplifier circuit, and a selector circuit. The first amplifier circuit is configured to receive a pair of receiving signals. The second amplifier circuit is configured to receive the pair of receiving signals. Based on a selection signal, the first amplifier circuit generates a pair of first amplifying signals according to the pair of receiving signals or the second amplifier circuit generates a pair of second amplifying signals according to the pair of receiving signals. The selector circuit is configured to output the pair of first amplifying signals or the pair of second amplifying signals according to the selection signal.

BROADBAND, HIGH-EFFICIENCY, NON-MODULATING POWER AMPLIFIER ARCHITECTURE

Apparatus and methods for a no-load-modulation power amplifier are described. No-load-modulation power amplifiers can comprise multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see essentially no modulation of its load between the power amplifier's fully-on and fully backed-off states. The power amplifiers can operate in symmetric and asymmetric modes. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained. Further improvements can be obtained by combining signals from the amplifiers with hybrid couplers.

PROGRAMMABLE GAIN AMPLIFIER SYSTEMS AND METHODS
20200212861 · 2020-07-02 ·

Systems and methods for amplifying an input signal include amplifier circuitry, an itail connection coupled between a positive voltage circuitry and the negative voltage circuitry and operable to generate an itail voltage corresponding to a greater of the positive voltage input signal (Vp) and the negative voltage input signal (Vn), a first resistor rgp disposed to receive the itail voltage and a first voltage corresponding to Vp, and a second resistor rgn disposed to receive the itail voltage and a second voltage corresponding to Vn. A first current output node is coupled to the output of rgp and operable to output a positive output current (Ioutp) corresponding to the current flowing through rgp, and a second current output is coupled to the output of rgn and operable to output a negative output current (Ioutn) corresponding to the current flowing through rgn.

High-power amplifier package

Package assemblies for improving heat dissipation of high-power components in microwave circuits are described. A laminate that includes microwave circuitry may have cut-outs that allow high-power components to be mounted directly on a heat slug below the laminate. Electrical connections to circuitry on the laminate may be made with wire bonds. The packaging allows more flexible design and tuning of packaged microwave circuitry.

Power amplification system with adaptive bias control

Power amplification system with adaptive bias control. In some embodiments a power amplification system includes a power amplifier including a radio-frequency (RF) input terminal for receiving an RF signal, an RF output terminal for providing an amplified RF signal, a supply voltage terminal for receiving a power amplifier supply voltage to power the power amplifier, and one or more bias terminals for receiving one or more bias signals. The power amplification system also includes a bias controller configured to provide the one or more bias signals to the one or more bias terminals, at least one of the one or more bias signals being based on the power amplifier supply voltage.

Frequency-segmented power amplifier

An example communication system includes a frequency-segmented power amplifier (PA) circuit that includes a plurality of PA segments. Each PA segment is configured to amplify a portion of a PA input signal in a different frequency band to generate a respective output signal (PA segment output signal). The frequency-segmented PA circuit further includes a combiner, configured to combine PA segment output signals from different PA segments to provide a power-amplified version of the PA input signal. Implementing such a frequency-segmented PA circuit may result in significant improvement in PA efficiency.

MULTIPLE-PORT SIGNAL BOOSTERS
20200204132 · 2020-06-25 ·

A signal booster is disclosed that includes a first interface port, a second interface port, a third interface port, a downlink signal splitter device, an uplink signal splitter device, a main booster and a front-end booster. The uplink signal splitter device can include a first uplink splitter port configured to direct uplink signals from the second interface port towards the first interface port. The uplink signal splitter device can include a second uplink splitter port configured to direct uplink signals from the third interface port towards the first interface port. The main booster can include a main downlink amplification path and a main uplink amplification path. The front-end booster can include a front-end downlink amplification path and a front-end uplink amplification path.

ELECTRONIC DEVICE INCLUDING PLURALITY OF ANTENNA ARRAYS

A communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT) are provided. The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The electronic device includes a first antenna module including a first amplifier configured to amplify a signal received from a communication circuit, a second antenna module including a second amplifier configured to amplify a signal received from the communication circuit, and an impedance matching circuit disposed between an output terminal of the first amplifier and an output terminal of the second amplifier.