A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.

A power amplifier module that includes a power amplifier and a controller is presented herein. The power amplifier module may include a set of transistor stages and a plurality of bias circuits. At least one transistor stage from the set of transistor stages may be in electrical communication with a first bias circuit and a second bias circuit from the plurality of bias circuits. The first bias circuit can be configured to apply a first bias voltage to the at least one transistor stage and the second bias circuit can be configured to apply a second bias voltage to the at least one transistor stage. The controller may be configured to activate one of the first bias circuit and the second bias circuit.

Spatial power-combining devices for higher frequency operation and increased bandwidth applications are disclosed. The spatial power-combining device includes a center waveguide section with a plurality of amplifier assemblies. The plurality of amplifier assemblies forms an input end and an output end, and an input inner conductor is mechanically attached to the input end, and an output inner conductor is mechanically attached to the output end. A method for joining a plurality of amplifier assemblies together to provide a center waveguide with an input end including an input connector receptacle and an output end including an output connector receptacle is also disclosed.

A multi-stage device includes multiple stages such as a first stage and a second stage. During operation, the first stage receives an input signal and outputs an intermediate signal based on the input signal. The second stage is coupled to the first stage to receive the intermediate signal and produce an output signal. According to one configuration, the second stage includes: i) a transistor, and ii) a circuit path between the first stage and the transistor. The transistor component is controlled to derive the output signal from the intermediate signal inputted to the circuit path.

Embodiments of radio frequency (RF) systems include a transmit/receive switch integrated with one or more power amplifiers and/or other components. The power amplifiers can have transformer-based architectures, and a power amplifier and switch can be integrated onto a single complementary metal oxide semiconductor die.

A method for calibrating a radiofrequency multichannel subsystem of a telecommunications payload includes a step of generating and injecting a calibration signal at one or more input access channel injection points; a step of tapping off the injected and propagated calibration signal at tapping-off points of an access channel at output; and then a step of estimating the amplitude and/or phase differences between the internal channels of the multichannel subsystem on the basis of the calibration signal injected at input, serving as a reference, and of the extracted calibration signal or signals; and then a step of correcting the amplitude and/or phase differences by way of correction means. The injected calibration signal is a chirp signal, formed of a chirp or of a sequence of at least two identical chirps. A calibration system implements the calibration method.

A power amplifying device includes a first amplification circuit amplifying a first signal having a first frequency component and a second frequency component; a second amplification circuit amplifying a second signal received through an output node of the first amplification circuit; a filter circuit connected between a ground node of the first amplification circuit and a common ground to pass the first and second frequency components to the common ground through the ground node; and an inverting circuit that phase-inverts a signal including second harmonic components of the first and second frequency components that are received through the ground node of the first amplification circuit and provide the phase inverted signal to the output node of the first amplification circuit.

A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.

A radio-frequency power amplification circuit includes: a power amplification sub-circuit and an output matching sub-circuit, wherein the power amplification sub-circuit is used for selecting, according to a received control signal corresponding to a radio-frequency mode, a power amplification parameter corresponding to the radio-frequency mode to amplify a received radio-frequency signal, and outputting the amplified radio-frequency signal; the output matching sub-circuit is connected to the power amplification sub-circuit and is used for receiving the amplified radio-frequency signal, and transmitting, according to the control signal, the amplified radio-frequency signal by using an impedance corresponding to the radio-frequency mode.

A first sub-collector layer functions as an inflow path of a collector current that flows in a collector layer of a heterojunction bipolar transistor. A collector ballast resistor layer having a lower doping concentration than the first sub-collector layer is disposed between the collector layer and the first sub-collector layer.