Embodiments of the disclosure relate to optimizing power efficiency of a power amplifier circuit to reduce power consumption in a remote unit in a wireless distribution system (WDS). A power amplifier circuit is provided in the remote unit to amplify a received input signal associated with a signal channel(s) to generate an output signal at an aggregated peak power. In this regard, a control circuit is configured to analyze at least one physical property related to the signal channel(s) to determine a maximum output power of the power amplifier circuit. Accordingly, the control circuit configures the power amplifier circuit according to the determined maximum output power. By configuring the maximum output power based on the signal channel(s) in the input signal, it may be possible to optimize the power efficiency of the power amplifier circuit, thus helping to reduce the power consumption of the remote unit.

A high-frequency amplifier includes: a carrier amplifier amplifying a first signal; a peak amplifier amplifying a second signal; a first transmission line connected between output terminals of the carrier amplifier and the peak amplifier, and having an electrical length equal to one-quarter wavelength of a center frequency in the predetermined frequency band; a second transmission line connected between one end of the first transmission line and the output terminal of the high-frequency amplifier, and having an electrical length equal to one-quarter wavelength of the center frequency; and an impedance compensation circuit with one end connected to a node between the first transmission line and the second transmission line. At the center frequency, an imaginary part of an impedance during viewing of the impedance compensation circuit from the node is opposite in polarity from an imaginary part of an impedance during viewing of the second transmission line from the node.

An RF frontend IC device includes an RF transceiver to transmit and receive RF signals and a frequency synthesizer to perform frequency synthetization to operate within a predetermined frequency band. The frequency synthesizer generates an LO signal to the RF transceiver to enable the RF transceiver to transmit and receive RF signals within the predetermined frequency band. The frequency synthesizer includes a QPG circuit to generate signals shifted in phases based on the LO signal and a phase shifting circuit to generate quadrant signals based on the signals shifted in phases. Each of the quadrant signals corresponds to one of the four quadrants in phases in the respective quadrant spaces. The phase shifting circuit includes multiple phase switches operable in a collaboration manner to further shift in phase based on the signal shifted in phases to generate the quadrant signals in proper quadrant spaces.

A Doherty amplifier circuit having a tunable impedance and phase (TIP) circuit to provide an adjustable alpha factor, which allows for a selection of power added efficiency (PAE) curves that are useful for applications having different modulations or to meet other criteria. Embodiments include a Doherty amplifier having a TIP circuit that provides for tunability of the impedance Z.sub.INV (resulting in an adjustable alpha factor) while maintaining the phase of the output of the carrier amplifier at 90 (for a selected polarity)a low phase variation. Embodiments of the TIP circuit include one or more series-connected TIP cells comprising at least one TIP circuit combined with a tunable phase adjustment circuit. In operation, when the impedance of a TIP cell is adjusted, adjustments within the cell are also made to provide a phase shift correction back towards 90 (at the selected polarity).

A power amplifier device includes a first amplifier, a second amplifier, a capacitor, a node, and an impedance matching circuit. The second amplifier amplifies a radio frequency signal transmitted from the first amplifier. The capacitor is coupled between an output terminal of the first amplifier and an input terminal of the second amplifier. The node is disposed between the input terminal of the second amplifier and the capacitor. The impedance matching circuit is coupled to the node and a common voltage terminal. The impedance matching circuit is substantially an open circuit at a center frequency of the radio frequency signal. The impedance matching circuit provides substantially a short-circuited path from the node to the common voltage terminal at a frequency twice the center frequency.

Charge-pump tracker circuitry is disclosed having a first switch network configured to couple a first capacitor between a voltage input terminal and a ground terminal during a first charging phase and couple the first capacitor between the voltage input terminal and a pump output terminal during a first discharging phase. A second switch network is configured to couple the second capacitor between the voltage input terminal and the ground terminal during a second charging phase and couple the second capacitor between the voltage input terminal and the pump output terminal during a second discharging phase. A switch controller is configured to control the first switch network and the second switch network so that the first discharging phase and the second discharging phase are in unison in a parallel mode and so that the first discharging phase and the second discharging phase alternate in an interleaved mode.

Circuits and methods related to power amplifiers. Power density matching circuits can be provided to match power densities in reference devices and amplifying devices. In some implementations, a power density matching circuit includes a temperature independent current translator with a first transistor and a third transistor coupled emitter to collector between a power supply node and ground and a second transistor and a fourth transistor coupled emitter to collector between the power supply node and ground. The transistors of the current translator can be sized relative to one another to set a current density in the amplifying transistor relative to a current density in the reference transistor. The current translation can provide power density matching between the amplifying transistor and the reference transistor.

Embodiments of RF amplifiers and packaged RF amplifier devices each include a transistor with a drain-source capacitance that is relatively low, an input impedance matching circuit, and an input-side harmonic termination circuit. The input impedance matching circuit includes a harmonic termination circuit, which in turn includes a first inductance (a first plurality of bondwires) and a first capacitance coupled in series between the transistor output and a ground reference node. The input impedance matching circuit also includes a second inductance (a second plurality of bondwires), a third inductance (a third plurality of bondwires), and a second capacitance coupled in a T-match configuration between the input lead and the transistor input. The first and second capacitances may be metal-insulator-metal capacitors in an integrated passive device.

A power oscillator using a GaN power amplifier, includes: the GaN power amplifier configured of a gallium nitride (GaN) element to amplify and output power of an input signal; a directional coupler for providing part of an output signal of the GaN power amplifier as a feedback signal; a phase shifter for changing a phase of the feedback signal provided by the directional coupler; and a first isolator for adjusting impedance mismatching generated by the phase shifter and transferring the feedback signal to the GaN power amplifier.

An amplifier module includes an input terminal; a first preamplifier formed in or on a first substrate and configured to amplify a signal that is input to the input terminal; a first postamplifier and a second postamplifier that are formed in or on a second substrate and that are configured to receive an output of the first preamplifier and output a differential signal; an output balun configured to receive the differential signal that is output from the first postamplifier and the second postamplifier; and a variable capacitance element. The output balun includes a primary winding subjected to the differential signal and a secondary winding, and the variable capacitance element is connected in parallel with the primary winding of the output balun.