An analog signal generating source comprising two or more digital-to-analog converters (DAC) combined to generate one or more frequency components. The analog signal source comprises a first path for generating substantially low frequency signals, the first path comprising a first one of the DACs; and a second path for generating substantially high frequency signals, the second path comprising a second one of the DACs. The analog signal source also comprises a data processor for processing an input signal and providing the processed input signal to the first and second paths; a combining circuit configured to combine outputs of the first and second paths into the source signal; a feedback portion configured to sense the source signal; and a servo loop configured to use the sensed source signal to adjust as need to maintain the source signal to substantially agree with the input signal.

Method of operating a power combiner network (1), the power combiner network (1) comprising a power combiner device (10) having N secondary ports (11(1, 2, N)) combining into one primary port (12), wherein respective N secondary port (11(1, 2, . . . , N)) is provided with a phase shifter arrangement (13) and a load control arrangement (14). Respective phase shifter arrangement (13) is configured to set a phase of a signal fed through respective N secondary port (11(1, 2, . . . , N)). Respective load control arrangement (14) is configured to set the N secondary ports (11(1, 2, . . . , N)) in an active or in an inactive operation mode. For I inactive secondary ports (11(1)) the load control arrangement (14) is further configured to set a phase of the signal reflected from the I inactive secondary ports (11(1)). The method comprises the method steps of; step A (100), selecting which of the N secondary ports (11(1, 2, . . . , N)) that should be set in an inactive operation mode and which of the N secondary ports (11(1, 2, . . . , N)) that should be set in an active operation mode, step B (110), setting selected I inactive secondary ports (11(1)) in an inactive operation mode by means of the load control arrangement (14), step C (120), retrieving a phase required for respective I inactive secondary port (11(1)) and retrieving a phase required for respective A active secondary port (11(2)) in order for respective A active secondary port (11(2)) to minimize the reflected signal from the power combiner device (10) and provide desired power to the primary port (12), step D (130), setting respective load control arrangement (14) for respective I inactive secondary port (11(1)) according to respective retrieved phase, and step E (140), setting respective phase shifter arrangement (13) for respective A active secondary port (11(2)) according to respective retrieved phase.

Power amplifier (PA) packages having air cavities enclosed by electrically-routed lids, as well as to method for fabricating such power amplifier packages, are disclosed. In embodiments, the PA package includes a package body having a package topside surface and a package bottomside surface. The package body is defined, at least in part, by a package substrate and an electrically-routed lid bonded to the package substrate to sealingly enclose an air cavity. The electrically-routed lid includes, in turn, an upper lid wall, peripheral lid sidewalls, and sidewall-embedded vias contained in the peripheral lid sidewalls and each extending essentially in a package height direction. Radio frequency (RF) circuitry is attached to the package substrate and located within the air cavity, while a topside input/output interface is provided on the upper lid wall and electrically interconnected with the RF circuitry through the sidewall-embedded vias of the electrically-routed lid.

An amplifier stage uses a loaded transistor amplifier circuit including a load that causes greater second order harmonic distortion energy than third order harmonic distortion energy to be produced in said loaded transistor amplifier circuit for amplifying a source audio signal to produce an audio output signal. The spectrum of the fundamental orders of harmonic distortion is adjusted to improve perceived sound quality or listening enjoyment.

An active noise source apparatus includes a pair of a first and second switched-biased noise amplifier branches (22, 23). A directional coupler (24) having a pair of input ports (3, 4) connected to combine the noise outputs from the first and second switched-biased noise amplifiers. One output port (4) of the directional coupler (24) is connected to a matched termination (Rtermination) and another output port (2) of the directional coupler (24) is connected to an output (25) of the active noise source.

An amplifier circuit (200) for compensating an output signal provided at an output (212) of a circuit (210) is disclosed. The amplifier circuit (200) comprises an output transmission line (230) connected between the output (212) of the circuit (210) and an output port (240) and an amplifier (220). The amplifier (220) comprises multiple sub-amplifiers (221, 222, 223, 224), inputs of the multiple sub-amplifiers (221, 222, 223, 224) are coupled to an input transmission line (250) for receiving an error signal; and outputs of the multiple sub-amplifiers (221, 222, 223, 224) are coupled at respective places along the output transmission line (230) to inject a compensation signal to the output port (240). The error signal is derived from a reference input signal and the output signal of the circuit (210), and is amplified in the amplifier (220) into the compensation signal.

A power amplification module includes first and second amplifiers for first and second communication modes, a bypass line that bypasses the first or second amplifier, an input switch circuit that supplies a radio frequency signal to the first or second amplifier in accordance with a communication mode when a desired output level is equal to or greater than a reference level, and that supplies a radio frequency signal to the bypass line when the desired output level is less than the reference level, and an output switch circuit that outputs a first amplified signal from the first amplifier or a second amplified signal from the second amplifier in accordance with the communication mode when the desired output level is equal to or greater than the reference level, and that outputs a radio frequency signal output from the bypass line when the desired output level is less than the reference level.

A power amplifier. The power amplifier includes a plurality of parallel coupled transistors. Each transistor has a control terminal coupled to receive a signal to be amplified and an output terminal coupled to a node. The power amplifier also includes a matching network having an input coupled to the node and an output coupleable to a load. The power amplifier further includes a first circuit branch forming a choke and harmonic trap of the power amplifier. The first circuit branch includes a first inductance, a second inductance and a first capacitor. The first inductance has a first terminal coupled to the node and a second terminal coupled to a first terminal of the second inductance. A second terminal of the second inductance is coupled to AC ground. The first capacitor is coupled in parallel with the second inductance.

Disclosed herein are signal amplifiers that provide impedance adjustments for different gain modes. The impedance adjustments are configured to result in a constant real impedance for an input signal at the amplifier. The amplifiers include a scalable impedance adjustment circuit that adjusts inductance and/or a device width to compensate for changes in the total impedance presented to an input signal. By providing impedance adjustments, the amplifiers reduce losses and improve performance by improving impedance matching over a range of gain modes.

An amplifier including a signal input terminal, at least one signal output terminal, a first and a second cascode amplifier circuits, a capacitor and a loading circuit. The signal input terminal receives an input signal. The first cascode amplifier circuit includes a first and a second input terminals and a first and a second output terminals. The first input terminal coupled to the signal input terminal receives the input signal. The second cascode amplifier circuit includes a third and a fourth input terminals and a third output terminal. The third input terminal is coupled to the first output terminal, and the third output terminal is coupled to the second input terminal. Two terminals of the capacitor are coupled to the fourth input terminal and the first output terminal respectively. A terminal of the loading circuit is coupled to the third output terminal, and another terminal of the loading circuit is coupled to the second output terminal. At least one of two terminals of the loading circuit is further coupled to the at least one signal output terminal.