A RF control circuit is provided and includes a controller, a divider, and a RF sensor. The controller selects a RF, which is a frequency of a reference LO signal. The divider receives a first RF signal detected in a substrate processing chamber and outputs a second RF signal. The first RF signal is generated by a RF generator and supplied to the substrate processing chamber. The RF sensor includes a lock-in amplifier, which includes: a RF path that receives the second RF signal; a LO path that receives the reference LO signal; a first mixer that generates an IF signal based on the second RF signal and the reference LO signal; and a filter that filters the IF signal. The controller generates a control signal based on the filtered IF signal and transmits the control signal to the RF generator to adjust the first RF signal.

An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

A testing system includes: a dividing circuit configured to receive a testing signal and provide a plurality of input signals according to the testing signal; and a plurality of integrated power-amplifiers coupled to the dividing circuit, each of the plurality of integrated power-amplifiers being configured to be tested by receiving a respective input signal of the plurality of input signals and generating a respective output signal for a predetermined testing time.

Techniques for generating a power tracking supply voltage for a circuit (e.g., a power amplifier) are disclosed. The circuit may process multiple transmit signals being sent simultaneously on multiple carriers at different frequencies. In one exemplary design, an apparatus includes a power tracker and a power supply generator. The power tracker determines a power tracking signal based on inphase (I) and quadrature (Q) components of a plurality of transmit signals being sent simultaneously. The power supply generator generates a power supply voltage based on the power tracking signal. The apparatus may further include a power amplifier (PA) that amplifies a modulated radio frequency (RF) signal based on the power supply voltage and provides an output RF signal.

A digital amplifier includes a pulse-width adjustment circuit that adjusts the pulse width of a digital signal, a switching circuit that amplifies the output signal of the pulse-width adjustment circuit, and a feedback signal generator that generates a feedback signal based on the output signal of the switching circuit.

A power amplifier (PA) system is provided for multi-mode multi-band operations. The PA system includes one or more amplifying modules, each amplifying module including one or more banks, each bank comprising one or more transistors; and a plurality of matching modules, each matching module being configured to be adjusted to provide impedances corresponding to frequency bands and conditions. A controller dynamically controls an input terminal of each bank and adjusts the matching modules to provide a signal path to meet specifications on properties associated with signals during each time interval.

A touchscreen controller includes a set of transmitters for generating transmit signals applied to electrically-conductive transmit lines of a touchscreen panel, and a set of receivers configured to receive the signals via electrically-conductive receive lines that are capacitively coupled to the transmit lines. Each receiver includes an integrator to integrate the received current signal to generate an output voltage used for determining a location, if any, of a finger or object touching the panel. The integrator includes input and output amplification stages, and a feedback capacitor coupled between an input and output of the cascaded amplification stages. The capacitance of the feedback capacitor is configured so that the integrator achieves a desired rejection of a received jammer current signal. To reduce the size of the feedback capacitor, a bypass amplification stage is provided to steer away some of the input jammer current from the input of the integrator.

In some embodiments, a differential input stage comprises a first n-type metal oxide semiconductor transistor (NMOS) pair coupled to a first input and a second input, a second NMOS pair coupled to the first input, a first output node, the second input, and a second output node, a first diode coupled to the first NMOS pair and the first output node, a second diode coupled to the first NMOS pair and the second output node, and a cascaded current source coupled to the first NMOS pair and the second NMOS pair.

A differential power amplifier having first and second amplifiers with first and second signal output terminals along with bias circuitry in communication with the first and second amplifiers is disclosed. The differential amplifier further includes a first output clamp coupled to the first signal output terminal and a bias control terminal of the bias circuitry, wherein the first output clamp is configured to limit voltage at the first signal output terminal to a first predetermined voltage magnitude and lower bias current to the first amplifier in response to an overvoltage at the first signal output terminal. A second output clamp is coupled to the second signal output terminal and is configured to limit voltage at the second signal output terminal to a second predetermined voltage magnitude.

A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.