A hybrid planar combiner for use in broadband high power multi-component power amplifier architectures in planar solid-state power amplifiers, which does not comprise impedance converters in the power amplifier layer, is suitable for hermetic construction, supports effective cooling infrastructure and enables easy in-circuit applications.

A heterojunction bipolar transistor includes a collector layer, a base layer, an emitter layer, and a ballast resistance layer. The collector layer is made of an n-type compound semiconductor material. The base layer is disposed on the collector layer and is made of a p-type compound semiconductor material. The emitter layer is disposed on the base layer and is made of an n-type compound semiconductor material having a band gap larger than a band gap of the base layer. The ballast resistance layer is disposed on the emitter layer and is made of an intrinsic or p-type compound semiconductor material.

An amplifier circuit includes an inductor coupled to an amplifier, an inductor coupled to an amplifier, an inductor provided in series in a first output path connecting the amplifier and the inductor, a capacitor coupled to the first output path and the ground, a capacitor provided in series in a second output path connecting the amplifier and the inductor, an inductor coupled to the second output path and the ground, and a first circuit coupled between a first path connecting the inductors and a second path connecting the capacitor and the inductor.

A power generator includes a plurality of amplifier blocks and a combiner. Each of the amplifier blocks include one or more amplifiers, and the combiner combines modulated power signals output from the amplifier blocks to generate an RF power signal of a load. The amplifier blocks are controlled to outphase the modulated power signals based on a phase angle. Ones of the amplifier blocks may perform discrete modulation to generate a respective one of the modulated power signals. The discrete modulation includes selecting different combinations of the amplifiers in one or more of the amplifier blocks to change the RF power signal in discrete steps. In embodiments, the amplifiers may be radio frequency power amplifiers.

A power amplifier includes a semiconductor die having a main amplifier and a peaking amplifier. The main amplifier includes at least one first transistor, and the peaking amplifier includes at least one second transistor that is different than the first transistor. The peaking amplifier is configured to modulate a load impedance of the main amplifier responsive to a common gate bias applied to respective gates of the first and second transistors. Related fabrication and methods of operation are also discussed.

In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.

A phased array element includes a transmit portion having a plurality of amplifier paths, each amplifier path having a driver amplifier and a power amplifier, a first transformer coupled to the power amplifier of a first amplifier path of the plurality of amplifier paths and a second transformer coupled to the power amplifier of a second amplifier path of the plurality of amplifier paths, a secondary winding of each of the first transformer and the second transformer coupled together by a common transformer segment, a transmit phase shifter switchably coupled to the plurality of amplifier paths, a receive portion coupled to the second transformer, the receive portion having a receive path having a low noise amplifier (LNA), and a receive phase shifter coupled to the LNA.

An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a common source input transistor, e.g., input field effect transistor (FET), and the second configured in a common gate configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration. During split mode, the coupling is added to the circuit to allow some of the signal present at the drain of each input FET to be coupled to the drain of the other input FET.

An amplifier circuit includes a plurality of gain stages that change a gain in each stage and include a first gain stage and a final gain stage, an output terminal that outputs a signal amplified by the plurality of gain stages, a negative input terminal connected to an input node of the first gain stage, a feedback circuit connected between an output node of the final gain stage and the negative input terminal, a first resistor connected between the output node of the final gain stage and the output terminal, an active load of the first gain stage including a first transistor, a second resistor connected to a gate or a base of the first transistor, and a capacitor connected between the gate or the base of the first transistor and the output node of the final gain stage.

A radio frequency front end system includes a power amplifier and a variable driver stage coupled to the power amplifier. The variable driver stage applies a ramp profile to the power amplifier according to a V.sub.ramp control signal and is configured to apply a linear ramp by setting a gain to a fixed target value.