Apparatus and associated methods relate to a peaking module fabricated on a semiconductor substrate including a follower circuit driving a series peaking circuit-branch, the module configured to extend the bandwidth of a track-and-hold circuit. In an illustrative example, the series peaking circuit-branch may include an inductive element. One or more tracks on a metal interconnect above the semiconductor substrate may form the inductive element, for example. In some examples, one or more peaking modules may be combined creating a customized frequency response. In some examples, one or more combined peaking modules may be adjusted by a controller providing dynamic frequency response customization during operation. The follower circuits may employ constant current biasing and/or constant-g.sub.m biasing to provide substantial immunity to process, temperature and voltage variations, for example. Various implementations of series peaking circuit-branch pre-emphasis may advantageously extend overall bandwidth of various circuits (e.g., high-speed track-and-hold circuits).

A system having a set of power amplifiers each having a primary inductive structure configured to provide an output signal. A secondary inductive structure is configured to inductively couple to each of the primary inductive structures. A transmission line is provided with a signal trace and a ground trace. The signal trace of the transmission line is connected to a first end of the secondary inductive structure. A return path from a second end of the secondary inductive structure is coupled via a resonant network to the ground trace of the transmission line, in which the return path is spaced away from the secondary inductive structure to minimize inductive coupling to the primary structures.

An apparatus, comprising an input transformer; a first differential transistor pair configured to receive a first back gate bias voltage; a second differential transistor pair configured to receive a second back gate bias voltage; a cross-coupled neutralization cap comprising PMOS or NMOS transistors and configured to receive a third back gate bias voltage; and an output transformer. A method of fixing at least one back gate bias voltage to impart a desired capacitance to the transistors of at least one of the first differential transistor pair, the second differential transistor pair, or the neutralization cap. The apparatus and method may provide a power amplifier having improved linearity and efficiency.

An amplifier arrangement for amplifying an input signal to an output signal for delivering to a load is disclosed. The amplifier arrangement comprises a power splitter configured to receive the input signal and produce split input signals. The amplifier arrangement further comprises a first amplifier branch comprising multiple main amplifier circuits. Output signals of the multiple main amplifier circuits are combined to generate a first output signal. The amplifier arrangement further comprises a second amplifier branch comprising at least one auxiliary amplifier circuit. The at least one auxiliary amplifier circuit is configured to receive a split input signal from the power splitter and produce a second output signal. The amplifier arrangement further comprises a power combiner configured to receive the first and second output signals and produce the output signal for delivering to the load.

Amplifiers for radio-frequency applications. In some embodiments, a power amplifier die can include a semiconductor substrate and a plurality of narrow band power amplifiers implemented on the semiconductor substrate. Each narrow band power amplifier can be configured to operate with a high voltage in an average power tracking mode and be capable of being coupled to an output filter associated with a respective individual frequency band. Each narrow band power amplifier can be sized smaller than a wide band power amplifier configured to operate with more than one of the frequency bands associated with the plurality of narrow band power amplifiers.

An amplification unit contains two or more sets containing a plurality of amplification circuits, and amplifies power of an RF (Radio Frequency) signal. A combining unit contains two or more combiners corresponding to the two or more sets, combines RF signals output by the amplification circuits, and outputs a resultant RF signal. The amplification unit has one chassis storing each amplification circuit. The amplification unit and the combining unit have two or more connectors which are arranged transversely. The amplification unit and the combining unit are attachable/detachable.

Power amplification units and methods are provided, which use a combiner and an auxiliary signal to feed the power amplifier (PA) with a signal that prevents or reduces operation of higher amplification stages during off periods of the received RF signal. The PA output is delivered through an output matching circuit configured to pass the RF signal and attenuate the auxiliary signal; and the combiner combines the RF signal and the auxiliary signal through respective filters to generate the RF input signal to the PA. An auxiliary signal generator may be configured to generate the auxiliary signal with relation to the RF signal as having a frequency spectrum lower than a cutoff RF frequency. Resulting lower power consumption, particularly in case of low duty cycle RF signals, reduces heating, enables longer battery use and increases reliability performance.

An amplification apparatus includes: at least one voltage converter for converting a voltage of supplied power which is supplied from an external power supply source to the amplification apparatus, to a lower voltage; and at least one amplifier unit operable by supplied power which has the lower voltage as converted by the at least one voltage converter, for amplifying a radio frequency signal.

Circuits, devices and methods related to adjustment of input signal for compensation of amplifier. In some embodiments, a control system for an amplifier can include a control circuit configured to provide a control signal based on an operating condition associated with the amplifier. The control system can further include a power adjustment component implemented along an input path associated with the amplifier and configured to adjust power of a signal to be amplified by the amplifier.

In some embodiments, a differential input stage comprises a first n-type metal oxide semiconductor transistor (NMOS) pair coupled to a first input and a second input, a second NMOS pair coupled to the first input, a first output node, the second input, and a second output node, a first diode coupled to the first NMOS pair and the first output node, a second diode coupled to the first NMOS pair and the second output node, and a cascaded current source coupled to the first NMOS pair and the second NMOS pair.