A power amplifier circuit includes: a first amplifier; a second amplifier; and an impedance inverter that delays an output of the first amplifier by a time equivalent to ? of a wavelength of a transmission line, and combines the output of the first amplifier delayed by the impedance inverter and an output of the second amplifier and outputs a combined output. The impedance inverter includes a plurality of unit circuits each constituted by an inductor and a capacitor, the plurality of unit circuits are cascade-connected to an output side of the first amplifier, an element included in each unit circuit of the plurality of unit circuits is connected in series to the element of an adjacent unit circuit, and another element included in each unit circuit of the plurality of unit circuits is connected between one end of the element of the same unit circuit.

A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.

Various methods and circuital arrangements for protection of a power amplifier from over voltage are presented. According to one aspect, a protection circuit coupled to a varying supply voltage of the power amplifier controls a biasing current to the power amplifier to limit a power dissipation through the power amplifier. An overvoltage protection circuit detects a level of the varying supply voltage and decreases the biasing current as a linear function of an increasing supply voltage once the supply voltage reaches a programmable voltage level. A slope of the linear function can be made programmable. Programmability of the voltage level and the slope can be used to control biasing currents to a plurality of power amplifiers operating at different times and having different requirements in terms of voltage limits and thermal breakdown. According to another aspect a voltage to current converter for use in the overvoltage protection circuit is presented.

RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.

A switching amplifier includes a first portion of a power stage; a second portion of a power stage; a pulse-width modulation (PWM) control loop coupled to control inputs of the first portion of the power stage; and a linear amplifier coupled to control inputs of the second portion of the power stage. The PWM control loop controls a first switch and a second switch of the first portion of the power stage. Between current terminals of the first switch and the second switch is a first signal output of the switching amplifier. The linear amplifier controls a third switch and a fourth switch of the second portion of the power stage. Between current terminals of the third switch and the fourth switch is a second signal output of the switching amplifier.

Provided is a dual-mode power amplifier with switchable operating frequencies, comprising at least two preamplifier circuits, a matching circuit for matching an output signal of each preamplifier circuit, an input transformer T1 with at least two output taps, an output stage amplifier circuit with the same number as the output taps of the input transformer T1, an output transformer T2, a switch S1 and a switch S2; circuit power supply VCC1 is loaded on an input end of the input transformer T1 via switch S1 and switch S2 respectively; operating frequencies of the matching circuit are different. The power amplifier realizes the switching of the maximum output power, supports the signal amplification in more frequency bands, and solves the problems in the prior art that the number of components is too large because more groups of power amplifiers for power amplification are needed for different frequency bands.

An electronic device may include wireless circuitry with a processor that generates baseband signals, an upconversion circuit that upconverts the baseband signals to radio-frequency signals, a power amplifier, an antenna, and a transmit filter with a frequency dependent filter response coupled between the output of the power amplifier and the antenna. To help mitigate the frequency dependent filter response, the wireless circuitry may further include predistortion circuitry having an amplifier load response estimator that implements a baseband model of the filter response, an amplifier non-linearity estimator that models the non-linear behavior of the amplifier, and a control signal generator for adjusting the power amplifier based on the output of the amplifier load response estimator and the amplifier non-linearity estimator.

Disclosed is an amplifier circuit comprising a first stage having first and second input terminals, a second stage configured to amplify a voltage supplied from the first stage and including a pull-up node and a pull-down node, a third stage including an output terminal, a tenth PMOS transistor, and a tenth NMOS transistors having gate electrodes respectively connected to the pull-up node and the pull-down node of the second stage, the third stage configured to perform a pull-up driving and pull-down driving of the amplified voltage, a first boosting circuit including an eleventh PMOS transistor having a gate electrode connected to the pull-up node and the first boosting circuit configured to increase a current in the first stage, and a second boosting circuit including an eleventh NMOS transistor having a gate electrode connected to the pull-down node and configured to increase the current in the first stage.

A power amplifier circuit includes a transistor having a first terminal that is configured to receive an input signal, a second terminal electrically coupled to ground, and a third terminal configured to transmit a combined amplified signal. The power amplifier circuit further includes a combining signal input path electrically coupled to the second terminal and configured to receive a combining signal and provide the combining signal to the second terminal of the transistor to generate, at least in part, the combined amplified signal.

A power amplifier circuit includes: a first differential amplifier that amplifies a first signal split from the input signal and outputs a second signal; a second differential amplifier that amplifies a third signal split from the input signal and outputs a fourth signal; a first transformer including a first input-side winding to which the second signal is input and a first output-side winding; a second transformer including a second input-side winding to which the fourth signal is input and a second output-side winding; a first phase conversion element that is connected in parallel with the first output-side winding and outputs a fifth signal; and a second phase conversion element that is connected in parallel with the second output-side winding and outputs a sixth signal. The first and second output-side windings are connected in series and output a signal obtained by adding voltages of the fifth and sixth signals together.