A signal processing circuit reduces die size and power consumption for each antenna element. The signal processing circuit includes a first set of ports, a third port, a first path, a second path and a first transistor. The first path is between a first port of the first set of ports and the third port. The second path is between a second port of the first set of ports and the third port. The first transistor is coupled between the first path and the second path. The first transistor is configured to receive a control signal to control the first transistor to adjust an impedance between the first path and the second path.

A transmit/receive switching circuit implementation reduces transmitting/receiving switching losses in a transceiver during different modes of operation. The implementation includes connecting a low noise amplifier and a power amplifier in accordance with a shunt configuration in the transceiver. The implementation also includes disabling the power amplifier to achieve a high impedance state by grounding an output stage bias and enabling the low noise amplifier and disabling one or more transistors connected to a path between the low noise amplifier and the power amplifier during a receive mode.

A power amplifier, a radio remote unit (RRU), and a base station, where the power amplifier includes an envelope controller, a main power amplifier, and an auxiliary power amplifier. The main power amplifier and the auxiliary power amplifier both set an envelope voltage output by the envelope modulator as operating voltages, and because the operating voltages of the main power amplifier and the auxiliary power amplifier may be adjusted simultaneously, symmetry of the power amplifier is improved, and an efficiency loss occurring probability is low, thereby enhancing efficiency of the power amplifier.

A semiconductor substrate includes emitter electrodes for multiple high-frequency amplifying transistors. An insulating substrate includes multiple land electrodes, ground electrodes, and multiple inductor electrodes. The land electrodes are formed on the front surface or near the front surface of the insulating substrate, and are joined to the respective emitter electrodes. The ground electrodes are formed inside the insulating substrate. Each of the inductor electrodes couples a corresponding one of the land electrodes to any of the ground electrodes in such a manner that the lengths of the coupling to the ground electrodes are individually determined.

Filtering architectures and methods for wireless applications. In some embodiments, a wireless architecture can include a pre-amplifier filter configured to filter a signal, and an amplifier assembly configured to amplify the filtered signal. The wireless architecture can further include a filter circuit configured to provide selective filtering of the amplified signal based at least in part on a rejection level of the pre-amplifier filter and a gain of the amplifier assembly. In some embodiments, such a wireless architecture can be implemented in a packaged module or a wireless device.

In a portable radio transceiver, a power amplifier system includes a saturation detector that detects power amplifier saturation in response to duty cycle of the amplifier transistor collector voltage waveform. The saturation detection output signal can be used by a power control circuit to back off or reduce the amplification level of the power amplifier to avoid power amplifier control loop saturation.

An operational amplifier circuit is provided. The operational amplifier circuit includes a differential input stage circuit and a loading stage circuit. The differential input stage circuit includes a first current source, a first transistor, a second transistor, a third transistor, and a fourth transistor. The control terminal of the first transistor receives a first input signal. The control terminal of the second transistor receives a second input signal. The third transistor has a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the first current source, and a control terminal coupled to the control terminal of the second transistor. The fourth transistor has a first terminal coupled to the second terminal of the second transistor, a second terminal coupled to the first current source, and a control terminal coupled to the control terminal of the first transistor.

Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.

A power amplification device, including a first amplification branch, a second amplification branch, a harmonic injection circuit, and a first output matching circuit. A first amplifier in the first amplification branch supports a first frequency. A second amplifier in the second amplification branch supports the first frequency and a second frequency, and the second amplifier is turned off for a signal of the first frequency that has a power value lower than an enabling threshold. The harmonic injection circuit injects a signal of the second frequency that is input from a second input terminal (I2) to a signal of the first frequency that is input from a first input terminal (I1) to obtain a signal of the first frequency that has undergone harmonic injection.

An embodiment provides an amplifier system with multiple amplification paths connected to a combiner for combination of signals amplified in the amplification paths, each amplification path comprising an amplifier and a matching network provided between the amplifier and the combiner, wherein the individual amplifiers can interact through the combiner, causing an active load-pull effect. The matching networks of the paths comprise harmonic terminations configured to one or more of reduce an overlap between the voltage and current waveforms within the amplifier connected to the matching network and improve the linearity of one or more of the amplifiers.