Patent classifications
H03F3/211
Circuits having a switch with back-gate bias
Electronic circuits with a switch and methods for operating a switch in an electronic circuit. A first amplifier is coupled by a first path with an antenna. A second amplifier is coupled by a second path with the antenna. A transistor is coupled with the first path at a node. The first transistor includes a back gate. A back-gate bias circuit is coupled with the back gate of the first transistor. The back-gate bias circuit is configured to supply a bias voltage to the back gate of the first transistor that lowers a threshold voltage of the transistor.
CIRCUIT MODULE HAVING DUAL-MODE WIDEBAND POWER AMPLIFIER ARCHITECTURE
A circuit module includes a power amplifier, a switch, and a bypass capacitor. The power amplifier has a signal input node coupled to an input signal, a signal output node to generate an output signal, and a power input node coupled to a supply output signal of a supply modulator. The switch is coupled between the power input node of the power amplifier and the bypass capacitor. The bypass capacitor is an equivalently removable bypass capacitor coupled between the switch and a ground level.
RF POWER AMPLIFIER FOR MAGNETIC RESONANCE IMAGING
An embodiment of the present invention provides a RF power amplifier. The RF power amplifier comprises an RF input distribution network, multiple amplifiers and a signal combining network. The RF input distribution network is configured to divide an input RF signal into a main input signal and an auxiliary input signal. The multiple amplifiers are coupled in parallel to the RF input distribution network and configured to amplify the main and auxiliary input signals respectively by a main amplifier contributing a larger portion of the output power of the RF power amplifier and an auxiliary amplifier contributing a smaller portion of the output power of the RF amplifier. Each of the main and auxiliary amplifiers is selected from the amplifiers according to an impedance Z.sub.L of the transmit coil. A loading level of the main amplifier is modulated to alleviate loading mismatch condition of the main amplifier by adjusting current contributions from the main amplifier and the auxiliary amplifier according to the impedance Z.sub.L of the transmit coil. The signal combining network is configured to combine the main amplified signal and the auxiliary amplified signal into an output signal to drive the transmit coil.
Diversity receiver front end system with tunable output matching circuit
Diversity receiver front end system with tunable input and output matching circuits. A receiving system can include a controller configured to selectively activate one or more of a plurality of paths between an input of the receiving system and an output of the receiving system. The receiving system can include a plurality of amplifiers. Each one of the plurality of amplifiers can be disposed along a corresponding one of the plurality of paths and can be configured to amplify a signal received at the amplifier. The receiving system can include one or more tunable matching circuits. Each one of the one or more tunable matching circuits can disposed at the input or the output and configured to present an impedance based on a tuning signal received from the controller.
Multistage amplifier linearization in a radio frequency system
A linearization circuit reduces intermodulation distortion in an amplifier that includes a first stage and a second stage. The linearization circuit receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency, generates an envelope signal based at least in part on a power level of the first signal, and adjusts a magnitude of the difference signal based on the envelope signal. When the amplifier receives the first signal at an input terminal, the first stage receives the adjusted signal, and the second stage does not receive the adjusted signal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation between the first frequency and the second frequency from the output of the amplifier.
Variable gain low noise amplifier
LNA circuitry includes an input node, and output node, a primary amplifier stage, a first ancillary amplifier stage, and an input gain selection switch. The primary amplifier stage is configured to provide a first gain response between a primary amplifier stage input node and a primary amplifier stage output node, wherein the primary amplifier stage input node is coupled to the input node and the primary amplifier stage output node is coupled to the output node. The first ancillary amplifier stage is configured to provide a second gain response between a first ancillary amplifier stage input node and a first ancillary amplifier stage output node, wherein the first ancillary amplifier stage output node is coupled to the primary amplifier stage output node. The input gain selection switch is coupled between the input node and the first ancillary amplifier stage input node.
Multi-way power amplifier circuit
A multi-way power amplifier circuit includes two baluns and a number (2N) of differential power amplifiers, where N2. Each balun generates a number (N) of corresponding differential intermediate signal pairs based on a respective to-be-amplified signal. Each differential power amplifier generates a respective differential amplified signal pair based on a respective differential intermediate signal pair. One of the baluns includes: a first transmission line and a second transmission line connected to each other; a number (N) of third transmission lines electromagnetically coupled to the first transmission line; and a number (N) of fourth transmission lines electromagnetically coupled to the second transmission line.
MULTI-MODE ENVELOPE TRACKING AMPLIFIER CIRCUIT
A multi-mode envelope tracking (ET) amplifier circuit is provided. The multi-mode ET amplifier circuit can operate in a low-resource block (RB) mode, a mid-RB mode, and a high-RB mode. The multi-mode ET amplifier circuit includes fast switcher circuitry having a first switcher path and a second switcher path and configured to generate an alternating current (AC) current. A control circuit activates the fast switcher circuitry in the mid-RB mode and the high-RB mode, while deactivating the fast switcher circuitry in the low-RB mode. More specifically, the control circuit selectively activates one of the first switcher path and the second switcher path in the mid-RB mode and activates both the first switcher path and the second switcher path in the high-RB mode. As a result, it is possible to improve efficiency of ET tracker circuitry and the multi-mode ET amplifier circuit in all operation modes.
ARCHITECTURE FOR HIGH-BANDWIDTH POWER SUPPLY TO POWER AMPLIFIER (PA) DISTRIBUTION NETWORK
A power supply to power amplifier (PA) distribution network may include a first power supply. The PA distribution network may further include at least one power amplifier. The power amplifier may be coupled to the first power supply. The power amplifier may include a driver stage and a power stage. The power amplifier may be coupled to the first power supply via a first switch.
CURRENT COMPENSATION CIRCUIT
A current compensation circuit for providing a current to an amplifier circuit includes a first amplifier, a first transistor and a first bias circuit. The first bias circuit provides a first bias current to the first amplifier. The current compensation circuit includes a power detection circuit, an operational amplifier circuit and a current-to-voltage converter. The power detection circuit detects and converts an input power or an output power of the first amplifier to a first detection voltage. The operational amplifier circuit generates a second detection voltage according to the first detection voltage and a calibration voltage. The current-to-voltage converter converts the second detection voltage to a compensation current. A first compensation current flows to the first amplifier through the first transistor according to the compensation current, such that the first amplifier is driven by the first bias current plus the first compensation current.