A communication unit includes a first input terminal to which a first transmission signal based on a first communication standard is input, a second input terminal to which a second transmission signal based on a second communication standard is input, a first transmission signal amplifier circuit outputting a first amplified transmission signal, or outputting a second amplified transmission signal, a first input-output terminal outputting the first amplified transmission signal or the second amplified transmission signal, and at least one of a first reception signal and a second reception signal inputted to the first input-output terminal, a first reception signal amplifier circuit performing at least one of operation of outputting a first amplified reception signal and operation of outputting a second amplified reception signal, a first output terminal outputting the first amplified reception signal, and a second output terminal outputting the second amplified reception signal.

Solder bumps are placed in direct contact with the silicon substrate of an amplifier integrated circuit having a flip chip configuration. A plurality of amplifier transistor arrays generate waste heat that promotes thermal run away of the amplifier if not directed out of the integrated circuit. The waste heat flows through the thermally conductive silicon substrate and out the solder bump to a heat-sinking plane of an interposer connected to the amplifier integrated circuit via the solder bumps.

An envelope tracking (ET) current bias circuit comprises an envelope detection circuit detecting an ET voltage from an input signal; a first voltage/current converting circuit converting a reference voltage into a direct current (DC) current and adjusting the DC current according to a first control signal; a second voltage/current converting circuit converting the ET voltage into an ET current, adjusting the ET current according to a second control signal, and removing a DC offset current from the ET current to provide an offset compensated ET current; and an arithmetic circuit calculating levels of the offset compensated ET current and the DC current to generate an ET bias current.

An inverted symmetrical four-stage Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier and a plurality of peak amplifiers. Outputs of the carrier amplifier and the peak amplifiers are provided to the combining unit through the offset unit including offset transmission lines each connected with the carrier amplifier and the peak amplifiers. The offset transmission lines have characteristic impedance and electrical lengths equal to each other such that the impedance seeing the amplifiers at the ends of the offset transmission lines become substantially short-circuited.

In a digital transmitter, a digital RF signal generation unit executes digital modulation on I and Q signals to convert the I and Q signal into first and second digital RF signals, respectively, with a bit rate which is twice a carrier frequency. A retiming unit delays the first digital RF signal according to a clock signal with a frequency which is 4n times (n is an integer) the carrier frequency to output the delayed first digital RF signal and delays the phase of the second digital RF signal by 90 degrees with respect to an output of the first digital RF signal to output the delayed second digital RF signal. First and second amplifiers amplify the first and second digital RF signals output by the retiming unit, respectively. A combiner combines the amplified first and second digital RF signals to generate one signal sequence.

Multiband power amplifier with cascode switching. A power amplification system can include a first transistor having a base configured to receive an input radio-frequency (RF) signal and having an emitter coupled to a ground potential. The power amplification system can include a plurality of second transistors. Each one of the plurality of second transistors can have a respective emitter coupled to a collector of the first transistor and can be configured to, when biased at a respective base, output an output RF signal at a respective collector. The power amplification system can further include a biasing circuit configured to bias one or more of the plurality of second transistors based on a control signal.

A driver circuit for a composite power amplifier configured to operate in at least one Chireix-mode a first and a second sub-amplifier for amplification of an input signal into an output signal is disclosed. An input network of the driver circuit comprises a means configured to provide a first signal which is linearly derivable from the input signal, and a second signal which is non-linearly derivable from the input signal. The input network combines the first signal, at zero degrees phase shift, and the second signal, at 90 degrees phase shift, to obtain a first feeding signal for the first sub-amplifier. Furthermore, the input network combines the first signal, at 180 degrees phase shift, and the second signal, at 90 degrees phase shift, to obtain a second feeding signal for the second sub-amplifier.

A broadband linear processing system includes a pre-processing module and a set of M linear processors coupled to the pre-processing module, M being an integer greater than 1. The pre-processing module includes a wavefront multiplexer having M input ports and M output ports. The wavefront multiplexer receives M input signals at the M input ports, performs a wavefront multiplexing transform on the M input signals and outputs M narrowband signal streams at the M output ports. The wavefront multiplexing transform has an inverse. Each of the M linear processors receives and processes a corresponding one of the M narrowband signal streams, and outputs a corresponding one of M processed narrowband signal streams.

An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.

Embodiments are generally directed to a transformer based on-package power combiner. An embodiment of a power combiner includes multiple primary coils on a first metal layer of a package; a secondary coil on a second metal layer of the package, the secondary coil including multiple secondary coil portions, wherein each primary coil is located to be aligned with a respective one of the secondary coil portions; a trace on a third metal layer of the package; and multiple vias to connect the secondary coil portions to the trace on the third metal layer.