An electronic circuit according to various embodiments may comprise: a switch circuit, wherein the switch circuit may comprise: a first switch connected to a first port and a second switch connected to a second port, the first and second switches being connected in series with each other; a first parallel switch connected to a node between the first switch and the second switch; and a first shunt inductor connected to the node between the first switch and the second switch and configured to cancel a parasitic capacitance component of the first parallel switch.

Disclosed is a dual-band coupling low-noise amplifying circuit and an amplifier, which comprises an input frequency dividing circuit, a high-frequency amplifying circuit, a low-frequency amplifying circuit and an output combining circuit. The input frequency dividing circuit includes a first duplexer, a first capacitor and a second capacitor, and the output combining circuit includes a second duplexer, a third capacitor and a fourth capacitor. The input frequency dividing circuit divides the received radio frequency signals into high-frequency signals and low-frequency signals, then inputs the high-frequency signals into the high-frequency amplifying circuit for power amplification, and inputs the low-frequency signals into the low-frequency amplifying circuit for power amplification, and outputs the high-frequency signals and the low-frequency signals after power amplification through the output combining circuit.

Apparatus and methods are provided for coupling RF signals. A lattice coupler design incorporating a pair of shunt inductors provides (i) a virtual ground for biasing and (ii) improved performance characteristics, in both splitter and combiner configurations. Magnetic coupling between the shunt inductors can be selected to maintain improved performance characteristics over a wide bandwidth, while retaining compactness and high efficiency. A design procedure, variations, and results are disclosed.

Techniques for generating a power tracking supply voltage for a circuit (e.g., a power amplifier) are disclosed. The circuit may process multiple transmit signals being sent simultaneously on multiple carriers at different frequencies. In one exemplary design, an apparatus includes a power tracker and a power supply generator. The power tracker determines a power tracking signal based on inphase (I) and quadrature (Q) components of a plurality of transmit signals being sent simultaneously. The power supply generator generates a power supply voltage based on the power tracking signal. The apparatus may further include a power amplifier (PA) that amplifies a modulated radio frequency (RF) signal based on the power supply voltage and provides an output RF signal.

A radio frequency front-end is disclosed having a first power amplifier (PA) having a first PA input and a first PA output, a second PA having a second PA input and a second PA output, and a low-noise amplifier (LNA) having an LNA output connected to a receive output terminal and an LNA input. An input 90° hybrid coupler has a first port input connected to a transmit terminal, a second port input connected to a fixed voltage node through an isolation impedance, a third port output connected to the first amplifier input and a fourth port output connected to the second amplifier input. An output 90° hybrid coupler has a first port output connected to a common terminal, a second port output connected to the LNA input, a third port input connected to the second PA output, and a fourth port input connected to the first PA output.

There is provided a RF-DAC that may include (i) a first PAM that includes a first group of first power amplifiers of different amplifications, (ii) a second PAM that includes a second group of second power amplifiers of different amplifications; (iii) a load that includes an output port and a transformer; (iv) power amplifiers control units, and a transformer control unit. During a cycle of operation (i) each one of the first and second PAMs is configured to receive one or more power amplifiers digital control signals and activate a single power amplifier per each of the first and second PAMS, (ii) the transformer control unit is configured to receive a transformer digital control signal and control a transformer parameter of the transformer, and (iii) the transformer is configured to receive a first PAM output signal and a second PAM output signal, and output a transformer output signal that reflects digital information represented by the one or more power amplifiers digital control signals and the transformer digital control signal.

An integrated transformer arrangement for combining output signals of multiple differential power amplifiers to a single-ended load. The integrated transformer arrangement comprises a first transformer branch comprising an inductor loop. The inductor loop comprises a set of N windings connected in series. The first transformer branch further comprises a number of primary inductors. Each primary inductor comprises a winding placed concentrically to one winding of the inductor loop, and each primary inductor is configured to couple to a differential output of one of the multiple differential power amplifiers. The integrated transformer arrangement further comprises a secondary inductor comprising a winding placed concentrically to a winding of the inductor loop, and the secondary inductor is configured to couple to the single-ended load.

A Doherty amplifier includes: a transistor for a carrier amplifier; a transistor for a peak amplifier; a transmission line connected between an output terminal of the transistor for the carrier amplifier and an output terminal of the transistor for the peak amplifier; a stub that is connected in parallel to the output terminal of the transistor for the peak amplifier and that is capacitive and inductive in a working frequency band; and an output matching circuit connected to the output terminal of the transistor for the peak amplifier, the transmission line, and an output load, the output matching circuit to transform an impedance of the output load into an impedance lower than the impedance of the output load.

In some examples, a hybrid Chireix-Doherty amplifier comprises a first and second input network, a main amplifier coupled to a first output of the first input network, an auxiliary amplifier coupled to a second output of the second input network, and a combiner network. The combiner network is coupled to a first output of the main amplifier and an output of the auxiliary amplifier. The combiner network includes an output node for coupling to a load, e.g., an antenna of a base station for a radio network. The main amplifier is implemented as an inverse class-F amplifier.

A programmable gain amplifier includes a programmable resistor ladder deployed across N.sub.max junction nodes and controlled by N.sub.max−1 resistor control signals, where N.sub.max is an integer greater than one; a common-gate cascode amplifier multiplexer comprising N.sub.max common-gate cascode amplifiers configured to receive N.sub.max internal voltages at the N.sub.max junction nodes and output N.sub.max output currents in accordance with N.sub.max amplifier control signals, respectively, to an output node that is loaded with a load; and an AC (alternate current) coupling capacitor configured to couple an input node to the first junction node.