A power amplifier circuit includes an input-stage power amplifier configured to receive a radio-frequency input signal, an output-stage power amplifier configured to output an amplified radio-frequency output signal, and an intermediate-stage power amplifier disposed between the input-stage power amplifier and the output-stage power amplifier. The intermediate-stage power amplifier includes a first transistor, a second transistor, and a capacitor having a first end connected to an emitter of the first transistor and a second end connected to a collector of the second transistor. The intermediate-stage power amplifier receives a signal at a base of the second transistor thereof and outputs an amplified signal from a collector of the first transistor thereof.

An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

An amplifier stage uses a loaded transistor amplifier circuit including a load that causes greater second order harmonic distortion energy than third order harmonic distortion energy to be produced in said loaded transistor amplifier circuit for amplifying a source audio signal to produce an audio output signal. The spectrum of the fundamental orders of harmonic distortion is adjusted to improve perceived sound quality or listening enjoyment.

In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.

Power amplification system with adjustable common base bias. A power amplification system can include a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The power amplification system can further include a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.

A method of a wireless transmitter is disclosed. The method is for mitigation of distortion caused by non-linear hardware components of the transmitter, wherein mitigation of distortion comprises mitigating at least one intermodulation component, wherein the transmitter is configured to process an input signal having an input signal spectrum, and wherein the transmitter comprises two or more signal branches, each signal branch comprising a respective non-linear hardware component. The method comprises modifying the input signal for a first one of the signal branches by applying a first phase shift to a first part of the input signal spectrum, wherein the first phase shift has a first sign and a first absolute value, and applying a second phase shift to a second part of the input signal spectrum. The second phase shift has a second sign which is opposite to the first sign, and a second absolute value which is equal to the first absolute value. The first and second parts are non-overlapping. The method also comprises modifying the input signal for a second one of the signal branches by applying the first phase shift to the second part of the input signal spectrum, and applying the second phase shift to the first part of the input signal spectrum. The method further comprises feeding the modified input signals to respective ones of the signal branches. Corresponding apparatus, wireless transmitter, communication device, and computer program product are also disclosed.

An apparatus is provided that includes circuitry for decomposing an input signal to multiple substantially constant-envelope components and an outphasing path for each substantially constant-envelope component. The apparatus also includes a modulator for discrete phase control in each outphasing path, an amplifier in each outphasing path and a combiner for combining output signals from the outphasing paths. A system and method are also provided.

A receiver circuit is disclosed. The receiver circuit includes an amplifier configured to generate an RF signal based on a received signal, where the RF signal includes an information signal and a blocker signal modulating an RF carrier frequency. The receiver circuit also includes an RF filter connected to the amplifier, where the RF filter is configured to selectively attenuate the blocker signal.

Disclosed are a digital audio power amplifier and a power amplifier loop. The power amplifier loop comprises an operational amplifier U1, a capacitor C1, a power amplifier output stage, a resistor R1, a resistor R2 and a noise control unit, wherein an inverting input end of the operational amplifier U1 is respectively connected to one end of the capacitor C1, one end of the noise control unit and an output end of a preceding DAC current source; an output end of the operational amplifier U1 is respectively connected to a control end of the power amplifier output stage and the other end of the capacitor C1; an output end of the power amplifier output stage is successively grounded by means of the resistors R1, R2; the other end of the noise control unit is connected to a connection point between the resistors R1, R2; the resistance values of the resistors R1, R2 are set to satisfy R1/R2=(N−2)/2, where N>2; the reference voltage of the operational amplifier U1 is equal to PVDD/N, with PVDD being a power supply voltage of the power amplifier output stage; and the noise control unit is a resistor module. The present application ensures the normal operation of the digital audio power amplifier.

A peak detector for a power amplifier is provided that includes a threshold voltage detector configured to pulse a detection current in response to an amplified output signal from the amplifier exceeding a peak threshold. A plurality of such peak detectors may be integrated with a corresponding plurality of power amplifiers in a transmitter. Should any peak detector assert an alarm signal or more than a threshold number of alarm signals during a given period, a controller reduces a gain for the plurality of power amplifiers.