The present invention, a Digital Power Amplifier (DPA) with filtered output relates to the transmission circuitry of wireless communications systems and more particularly to high frequency power amplifier circuits using digital intensive techniques on cost efficient semiconductor technologies. Today, we experience an ever-increasing need for low cost, low power wireless transmitters in the millimeter wavelength region. Current solutions rely on analog PA circuits. The background art does not contain a solution for bridging the gap between the operation frequencies of the digital circuits on a cost-efficient technology such as CMOS and the millimeter wavelength transmission frequencies demanded in numerous applications. The DPA allowing the direct feeding of digital data to a high frequency amplifying circuit. In this way, design challenging and costly analog processing up-conversion stages are avoided. The DPA comprises a bank of switching amplifying elements, a switch capacitor trap filter taping on the bank of switching amplifying elements for shaping the frequency characteristic of the produced radio frequency (RF) waveform and an adaptive biasing circuit able of dynamically controlling the power consumption within the switching amplifying elements. It can have a wide spectrum of applications where low cost but high efficiency power amplifiers are needed, such as in the Internet of Things (IoT), Wi-Fi and 5G cellular communications.

A multi-band power amplifier module includes at least one transmission input terminal, at least one power amplifier circuit that receives a first transmission signal and a second transmission signal through the at least one transmission input terminal, a first filter circuit that allows the first transmission signal to pass therethrough, a second filter circuit that allows the second transmission signal to pass therethrough, at least one transmission output terminal through which the first and second transmission signals output from the first and second filter circuits are output, a transmission output switch that outputs each of the first and second transmission signals output from the at least one power amplifier circuit to the first filter circuit or the second filter circuit, and a first tuning circuit that adjusts impedance matching between the at least one power amplifier circuit and the at least one transmission output terminal.

In one aspect, a power amplifier apparatus comprising a power amplifier (PA) and an adaptive controller is provided. The PA comprises at least one transistor and the adaptive controller is configured to control a bias voltage of the transistor based on a measured power efficiency of the PA and a measure output signal quality of the PA. In another aspect, a method of optimizing PA performance is provided. The PA comprises at least one transistor and the method includes initializing a bias voltage of the transistor, receiving measurements indicating a power efficiency and an output signal quality of the PA, evaluating the received measurements, calculating a new bias voltage for the transistor based on the evaluation, and applying the calculated new bias voltage to the transistor.

An improved method of providing high burst power to audio amplifiers from limited power sources, using parallel power paths to increase system efficiency without need for a power path controller, thus utilizing a simplified circuit operation and maximizing average power available for both the amplifier and supporting circuitry.

The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.

An envelope tracking (ET) power amplifier apparatus is provided. The multi-mode power amplifier apparatus includes a pair of power amplifiers configured to amplify a radio frequency (RF) signal(s) and an output circuit that outputs the amplified RF signal(s) to a signal output(s). In examples disclosed herein, a control circuit can cause the multi-mode power amplifier apparatus to operate in different power management modes by changing a load impedance coupled to the signal output(s). In a non-limiting example, the control circuit can change a power management mode of the multi-mode power amplifier apparatus based on modulation bandwidth of the RF signal(s). As a result, the multi-mode power amplifier apparatus can operate across a wide range of modulation bandwidth without compromising efficiency and performance.

A Doherty amplifier including a main amplifier and a peak amplifier is mounted on a package substrate. A low noise amplifier is further mounted on the package substrate. A transmit/receive switch switches in terms of time between a transmission connection state in which an output signal of the Doherty amplifier is supplied to an antenna and a reception connection state in which a signal received by the antenna is inputted to the low noise amplifier.

A digital signal process unit includes a first cancel signal generation unit and a second cancel signal generation unit. The first cancel signal generation unit generates, as a first cancel signal component, a cancel signal component corresponding to an image signal included in an analog signal output from a mixer. The second cancel signal generation unit generates, as a second cancel signal component, a cancel signal component corresponding to a leakage signal generated between an input and output of the mixer. The digital signal process unit includes subtractors for subtracting the first cancel signal component and the second cancel signal component from a signal component corresponding to a frequency band divided from an input signal to obtain a digital signal.

In order to operate a power amplifier for synthesizing a plurality of amplifier circuits with high efficiency, the gate voltages of the field-effect transistors (FETs) of the plurality of amplifier circuits are adjusted according to an individual difference in saturated power between the amplifier circuits. Specifically, the output ratios of the amplifier circuits (AMP-4, 8) with low saturated power are reduced, whereas the output ratios of the amplifier circuits (AMP-2, 6) with high saturated power are increased. Thus, a device is operated with high efficiency.

Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.