A power amplifier circuit includes a first transistor having the base coupled to an input terminal, the collector coupled to an output terminal, and the emitter coupled to ground, a first bias circuit coupled to the base of the first transistor via the first resistance element, a second transistor having the base coupled to the input terminal, the collector coupled to the output terminal, and the emitter coupled to ground, a second bias circuit coupled to the base of the second transistor via the second resistance element, and a first impedance circuit having a first end coupled between the base of the first transistor and the input terminal and a second end coupled between the first bias circuit and the first resistance element and being configured to be opened for a direct-current component and to be closed for an alternating-current component.

A complementary envelope detector contemplates using two pair of mirrored transistors to provide a differential output envelope signal to an associated envelope tracking integrated circuit (ETIC) that supplies control voltages to an array of power amplifiers. While bipolar junction transistors (BJTs) may be used, other exemplary aspects use field effect transistors (FETs). In an exemplary aspect, a first pair are negative channel FETs (nFETs) and a second pair are positive channel FETs (pFETs).

A multi-band Doherty power amplifier (DPA) is provided. A dual-band Doherty power amplifier (DB-DPA) is based on a 3-way architecture and comprises a main amplifier for each band and an auxiliary amplifier handling both bands. The 3-Way DB-DPA improves the average drain efficiency in concurrent dual-band operation compared to the traditional 2-Way DB-DPA, by avoiding early clipping in the main amplifiers, while benefiting from load-pulling from the auxiliary power amplifier.

A transistor amplifier includes a die comprising a gate terminal, a drain terminal, and a source terminal, a circuitry module on the transistor die and electrically coupled to the gate terminal, the drain terminal, and/or the source terminal, and one or more passive electrical components on a first surface of the circuitry module. The one or more passive electrical components are electrically coupled between the gate terminal and a first lead of the transistor amplifier and/or between the drain terminal and a second lead of the transistor amplifier.

Increase in power-added efficiency can be achieved. A second base of a second transistor is connected to a first collector of a first transistor. A third base of a third transistor is connected to the first collector of the first transistor, and a third collector of the third transistor is connected to a second collector of the second transistor. A second bias circuit includes a fifth transistor connected to the second base of the second transistor. A third bias circuit includes a sixth transistor connected to the third base of the third transistor. A first current limiting circuit includes a seventh transistor, a first collector resistor, and a first base resistor. A second current limiting circuit includes an eighth transistor, a second collector resistor, and a second base resistor.

RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.

A bias circuit for a Doherty amplifier, characterized by comprising: an input port with an input impedance, wherein the input port is configured to receive a bias signal from a power supply; a first output port configured to provide a bias signal to an amplifier; a second output port configured to provide a bias signal to an amplifier; a two port impedance transformer with an input connected to the first input port, and an output of the two port impedance transformer having an intermediate impedance; an in-phase N-port dividing impedance transformer with an input connected to the output of the two port impedance transformer, wherein the in-phase N-port dividing impedance transformer comprises: a first output connected to the first output port having a first output impedance; and a second output connected to the second output port having a second output impedance.

The present invention relates to a high-frequency semiconductor device. A conventional high-frequency semiconductor device including an input second-order harmonic matching circuit has such a problem that gain decrease occurs. In a high-frequency semiconductor device (100) of the present invention, two adjacent unit transistor cells (7) and (8) are connected to one input second-order harmonic matching circuit (19) provided on an upper surface of a semiconductor substrate (1). The input second-order harmonic matching circuit (19) includes a first capacitor (13), a first inductor (14), a second capacitor (15), and a second inductor (16). The first capacitor (13) and the first inductor (14) resonate at the frequency of a fundamental wave, and each of impedances as seen by input electrodes of the two unit transistor cells (7) and (8) is short-circuited at the frequency of a second-order harmonic.

A power amplifier is capable of operating in a first power mode and a second power mode with a gain lower than a gain of the first power mode. The power amplifier is connected to a first common terminal of the first switch. Two or more filters are connected to two or more first selection terminals other than at least one first selection terminal among three or more first selection terminals of the first switch. The at least one first selection terminal of the first switch and at least one second selection terminal of a second switch are connected. The first switch is capable of switching between a first path passing through at least one of the two or more filters and a second path not passing through any of the two or more filters but passing through the at least one first selection terminal.

A power amplifier provides reduction of click and pop in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to ramp the power amplifier output from ground to an offset voltage to reduce the “click and pop” sound. The first amplifier and the auxiliary amplifier having a shared feedback loop. An output of the first amplifier and an output of the auxiliary amplifier may be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple the first amplifier output or the auxiliary amplifier output to the shared feedback loop.