A device includes an integrated circuit (IC) die. The IC die includes a silicon germanium (SiGe) substrate, a first RF signal input terminal, a first RF signal output terminal, a first amplification path between the first RF signal input terminal and the first RF signal output terminal, a second RF signal input terminal, a second RF signal output terminal, and a second amplification path between the second RF signal input terminal and the second RF signal output terminal. The device includes a first power transistor die including a first input terminal electrically connected to the first RF signal output terminal and a second power transistor die including a second input terminal electrically connected to the second RF signal output terminal. The first amplification path can include two heterojunction bipolar transistors (HBTs) connected in a cascode configuration and the second amplification path can include two HBTs connected in a cascode configuration.

A sensor assembly including a capacitive sensor, like a microelectromechanical (MEMS) microphone, and an electrical circuit therefor are disclosed. The electrical circuit includes a first transistor having an input gate connectable to the capacitive sensor, a second transistor having an input gate coupled to an output of the first transistor, a feedforward circuit interconnecting a back-gate of the second transistor and the output of the first transistor, and a filter circuit interconnecting the output of the first transistor and the input gate of the second transistor.

The processing of audio signals is shown in which a first gain-adjustable amplifier is configured to receive a feed forward signal from an input and a second gain-adjustable amplifier is configured to receive a feedback signal from an output. A gain controller supplies a first gain control signal to the first gain-adjustable amplifier, wherein the gain controller supplies a complementary second gain control signal to the second gain-adjustable amplifier, which may be the reciprocal of the first gain control signal. A first combiner is arranged to combine a first output from the first gain-adjustable amplifier with a second output from the second gain-adjustable amplifier. A plurality of filter elements are configured in parallel, wherein each filter element receives an output from the first combiner. A second combiner combines outputs from the filter elements with the original input signal and the filter elements have mutually different filtering characteristic.

A Doherty amplifier includes: a first amplifying element to amplify a first signal; a second amplifying element to amplify a second signal having a phase difference with the first signal; a first transmission line connected to an output terminal of the first amplifying element; and a second transmission line connected to an output terminal of the second amplifying element, wherein the first transmission line and the second transmission line are equal to each other in characteristic impedance, the phase difference between the first signal and the second signal is not equal to a difference in electrical length between the second transmission line and the first transmission line, and the first signal having passed through the first transmission line and the second signal having passed through the second transmission line are subjected to different phase synthesis.

Methods and devices for reducing DC current consumption of a multi-stage LNA amplifier. According to one aspect, first and second amplification stages are stacked to provide a common conduction path of a DC current. The first stage includes a common-source amplifier, the second stage includes a common-drain amplifier. Coupling between the two stages is provided by series connection of load inductors of the respective stages and a capacitor coupled at a common node between the inductors. According to another aspect, a current splitter circuit is used to split a current to the first stage according to two separate conduction paths, one common path to the two stages, and another separate from the second stage. According to yet another aspect, the current splitter circuit includes a feedback loop that controls the splitting of the current so to maintain a constant current through the common path.

A tracking power supply includes a power conversion subsystem and one or more tracking subsystems. The power conversion subsystem is configured to generate N power rails, where N is an integer greater than one. Each tracking subsystem includes a switching network and a controller. The switching network is electrically coupled between each of the N power rails and a tracking power rail of the tracking power supply. The controller is configured to control operation of the switching network according to a tracking signal associated with a load powered by the tracking power supply, such that a voltage at the tracking power rail is one of two or more values, as determined at least partially based on the tracking signal. The controller is further configured to adjust voltage of at least one of the N power rails.

Amplifiers, amplification circuits, and phase shifters, for example, for flexibly adjusting an output phase to thereby meet a requirement of a constant phase on a link in a communications field, are provided. In one aspect, an amplifier includes first, second, and third MOS transistors. The first MOS transistor includes a gate separately coupled to a signal input end and a bias voltage input end, a source coupled to a power supply, and a drain separately coupled to sources of the second and third MOS transistors. A drain of the third MOS transistor is coupled to a ground, and a drain of the second MOS transistor is coupled to a signal output end. The bias voltage input end is configured to receive a bias voltage to adjust a phase difference between an input signal at the signal input end and an output signal at the signal output end.

In accordance with an aspect of the present disclosure, there is provided a power amplification apparatus, the apparatus comprising: an input part; a first-1 transformer and a first-2 transformer connected to the input part in parallel; a first amplifier and a second amplifier connected to the first-1 transformer and the first-2 transformer, respectively; a first switch connected to one side of the first-2 transformer; a second-1 transformer and a second-2 transformer connected to the first amplifier and the second amplifier, respectively, and connected to an output part in parallel; and a second switch connected to one side of the second-2 transformer.

RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

A variable gain amplifier includes a first transconductor circuit coupled to a first input terminal, a first output terminal, and a second output terminal of the variable gain amplifier, the first transconductor circuit including: a plurality of positive coefficient transistors coupled to the first output terminal and configured to selectively conduct current in response to a first binary code, a plurality of negative coefficient transistors coupled to the second output terminal and configured to selectively conduct current in response to a second binary code, and a plurality of amplifying transistors, each having a gate electrode coupled to the first input terminal, a first electrode coupled to a ground reference, and a second electrode coupled to a pair of coefficient transistors including one of the plurality of positive coefficient transistors and one of the plurality of negative coefficient transistors.