A noise detecting circuit including an amplifier circuit, a filtering circuit and a comparing circuit. The amplifier circuit is arranged to amplify an input signal and output an amplified signal, wherein the input signal is received from a circuit to be detected and indicates a noise level of the circuit to be detected. The filtering circuit is coupled to the amplifier circuit and arranged to filter the amplified signal and output a filtered signal. The comparing circuit is coupled to the filtering circuit and arranged to compare the filtered signal to a reference voltage and output an output signal indicating the noise level of the circuit to be detected.

A power amplifier circuit includes a first path and a second path between an input terminal and an output terminal, a first amplifier located in the first path operative in a first mode, a second amplifier located in the second path operative in a second mode, a first matching circuit between the first amplifier and the output terminal in the first path, a first capacitor having a first end connected to the output terminal side of the first matching circuit, and a second end, a first inductor having a first end connected to the second end of the first capacitor and a second end grounded, and a short-circuit switch connected in parallel with the first inductor. The short-circuit switch short-circuits the first and second ends of the first inductor in the first mode and is placed in an open-circuit position in the second mode.

A low noise amplifier includes a preamplifier, first differential amplifiers, second differential amplifiers, a signal adder, and a load circuit. The preamplifier receives an input signal, and amplifies the input signal to generate a first signal. The input signal and the first signal have the same phase. The first differential amplifiers receive the first signal and a first reference signal and generate a first output differential signal pair. The second differential amplifiers receive the input signal and a second reference signal and generate a second output differential signal pair. The signal adder adds up the first output differential signal pair and the second output differential signal pair. The load circuit is coupled to the signal adder, and generates a third output differential signal pair according to the addition result.

This application is directed to methods and devices for an efficient power amplification system. An electronic device includes a first and a second power amplifier that are coupled to a quadrature combiner, a temperature monitoring circuit coupled to the first and second power amplifiers, and a controller coupled to the temperature monitoring circuit. The temperature monitoring circuit is configured to determine a temperature difference between the first and second power amplifiers. The controller is configured to adjust operation of at least one of the first and second power amplifiers to reduce the temperature difference between the first and second power amplifiers.

The present disclosure relates to a semiconductor device with isolation and/or protection structures. A semiconductor device can include a substrate, a first transistor and a second transistor, wherein the first transistor and the second transistor are formed on the substrate, and an isolation structure formed on the substrate. The isolation structure can be formed on the substrate between the first transistor and the second transistor. The isolation structure can be configured to isolate the first transistor and the second transistor.

Embodiments of a linear equalizer are disclosed. In an embodiment, a linear equalizer includes a plurality of input transistors, a plurality of gain control transistors and first and second impedance elements. The plurality of input transistors is connected to input terminals of the linear equalizer to receive input signals. The plurality of gain control transistors is connected between a supply voltage and the plurality of input transistors. The plurality of gain control transistors is also connected to gain control terminals to receive gain control signals. At least some of the gain control transistors are connected to output terminals of the linear equalizer to transmit output signals. The first and second impedance elements are connected between at least some of the input transistors and at least one fixed voltage. A peaking gain of the linear equalizer is defined by gain control signals applied to the gain control terminals.

Aspects of the present disclosure relate to a receiver including an amplifier circuit. The amplifier circuit includes a common-source amplifier having an input and an output, and a common-gate amplifier having an input and an output, wherein the input of the common-gate amplifier is coupled to the output of the common-source amplifier. The receiver also includes a first receive chain coupled to the output of the common-gate amplifier, and a second receive chain coupled to the output of the common-source amplifier.

A wireless repeater is disclosed. The wireless repeater can include a main booster with a first gain unit with a first adjustable gain and a second gain unit with a second adjustable gain. The wireless repeater can include a front end booster communicatively coupled to the main booster, with a coaxial cable coupled between the main booster and the front end booster. A test signal generator is configured to generate a direct current test signal or a radio frequency test signal to determine a signal loss of the coaxial cable. The wireless repeater can include a control unit to adjust one or more of the first adjustable gain or the second adjustable gain based on the determined signal loss of the coaxial cable.

A mixer includes a load portion connected between an input terminal of a first power voltage and an output terminal of the radio frequency transmit signal and configured to adjust a magnitude of the radio frequency transmit signal, a first switching unit connected to an output terminal of the radio frequency transmit signal, and configured to perform a first switching operation in response to a plurality of local oscillation signals, and a second switching unit connected between the first switching unit and an input terminal of a second power voltage, lower than the first power voltage, and configured to perform a second switching operation in response to a plurality of baseband signals, the plurality of local oscillation signals include an I+ baseband signal, an I− baseband signal, a Q+ baseband signal, and a Q− baseband signal, and the second switching unit includes a first branch performing a switching operation under control of the I+ baseband signal and the Q+ baseband signal, a second branch performing a switching operation under control of the I− baseband signal and the Q− baseband signal, a third branch performing a switching operation under control of the Q+ baseband signal and the I− baseband signal, and a fourth branch performing a switching operation under control of the Q− baseband signal and the I+ baseband signal.

A Doherty power amplifier comprises a splitter network, a first amplifier path comprising at least a first sub-amplifier and a first output matching network; and a second amplifier path comprising at least a second sub-amplifier amplifier and a second output matching network. The Doherty power amplifier further comprises a load modulation network comprising four transmission lines. Each transmission line is a quarter wavelength line at a fundamental frequency of the input signal.