An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

A multi-stage amplifier including a pre-driver stage, and method of operating the same. In one example, the amplifier includes an output stage with a first output transistor coupled to an oppositely doped second output transistor and to an output terminal. The pre-driver stage includes with a first driver transistor coupled to the first output transistor, and a second driver transistor coupled to the second output transistor. The pre-driver stage also includes a first current mirror and a second current mirror coupled to the first driver transistor and the second driver transistor. The pre-driver stage also includes a first translinear loop having a first translinear loop transistor and a second translinear loop having a second translinear loop transistor coupled to the first output transistor and the second output transistor.

A multistage amplifier includes: N amplifiers (N≥2), a (k+1).sup.th amplifier cascaded to a k.sup.th amplifier (1≤k≤N−1), and each amplifier being configured to amplify a multicarrier signal; and an extraction circuit including an input and an output, the input being connected to an output of a j.sup.th amplifier (1≤j≤N−1), and the output providing a compensation signal to an input of a (j+1).sup.th amplifier or an output of the (j+1).sup.th amplifier. The extraction circuit includes a filter circuit connected to the output of the j.sup.th amplifier that extracts a distortion frequency component of n times a differential frequency f2−f1 (n≥1), a phase shifter cascaded to the filter circuit that shifts a phase of the component, and a gain adjustment circuit cascaded to the phase shifter that adjusts an amplitude of the component and generates the compensation signal.

A radio-frequency circuit includes a first switch which includes a common terminal, a first selection terminal, and a second selection terminal, and switches between connecting the common terminal and the first selection terminal and connecting the common terminal and the second selection terminal; a first low-noise amplifier including an input terminal connected to the first selection terminal, and a second low-noise amplifier including an input terminal connected to the second selection terminal. The frequency band in which the first low-noise amplifier amplifies a radio-frequency signal by at least a predetermined gain includes the frequency band in which the second low-noise amplifier amplifies a radio-frequency signal by at least a predetermined gain.

Apparatus and methods for quadrature combined Doherty amplifiers are provided herein. In certain embodiments, a separator is used to separate a radio frequency (RF) input signal into a plurality of input signal components that are amplified by a pair of Doherty amplifiers operating in quadrature. Additionally, a combiner is used to combine a plurality of output signal components generated by the pair of Doherty amplifiers, thereby generating an RF output signal exhibiting quadrature balancing.

A first sub-collector layer functions as an inflow path of a collector current that flows in a collector layer of a heterojunction bipolar transistor. A collector ballast resistor layer having a lower doping concentration than the first sub-collector layer is disposed between the collector layer and the first sub-collector layer.

A high frequency amplifier includes an asymmetrical Doherty amplifier having a carrier amplifier, a peak amplifier, a branch circuit, and a phase adjusting circuit, a driver amplifier, and a base member mounting a first circuit board mounting the driver amplifier, the carrier amplifier, and the peak amplifier and a second circuit board mounting the circuits. The branch circuit divides a path of a RF signal into input paths of the peak and carrier amplifiers. The driver amplifier, the carrier amplifier, and the peak amplifier have rear surfaces in contact with the base member. The electrical length from the output terminal of the driver amplifier to the input terminal of the peak amplifier, when converted based on a phase of the signal, is from (2n+1)×π−α/4 to (2n+1)×π+π/4, where n is an integer greater than or equal to zero.

Disclosed are a Doherty power amplifier (2), a controlling method and a device. In the Doherty power amplifier (2), the even order harmonic components can be fed to the drain of the amplifier to realize even order harmonic modulation. The even order harmonic components have higher power level than the odd order harmonic components, therefore, higher efficiency could be achieved.

The embodiments described herein include amplifiers that are typically used in radio frequency (RF) applications. Specifically, the amplifiers described herein include a phase distortion compensation circuit that can compensate for input impedance variations that could otherwise lead to reduced efficiency and power performance. In one specific embodiment, the phase distortion compensation circuit is used to compensate for input impedance variations in the peaking amplifiers of a Doherty amplifier. In such embodiments, the phase distortion compensation circuit can absorb the non-linear input impedances of the peaking amplifiers in a way that may facilitate improved phase maintenance between the carrier and peaking stages of the Doherty amplifier.

An amplification circuit includes an input terminal, an output terminal, a capacitor, a bias unit, an amplification unit, and an impedance unit. The input terminal receives a radio frequency signal. The capacitor is coupled to the input terminal and the bias unit. The bias unit includes a transistor for controlling the bias current. The transistor has a first terminal for receiving a system voltage, and a control terminal coupled to the reference voltage terminal. The amplification unit has an input terminal coupled to the capacitor and the bias unit, and an output terminal coupled to the output terminal of the amplification circuit. The impedance unit has a first terminal coupled to the bias unit, and a second terminal coupled to the input terminal of the amplification circuit and the capacitor. The impedance unit adjusts the amplifying linearity of the amplification circuit according to a selection signal.