A hearing prosthesis circuit includes a power source, a first amplifier coupled to the power source, and a second amplifier coupled to the power source. The circuit also includes a stimulation component coupled to the first amplifier and the second amplifier. The stimulation component is configured to provide an output in accordance with an electrical signal that includes audio data. Further, the circuit includes a controller coupled to the first amplifier and the second amplifier. The controller is operable in accordance with a first operational setting to use the first amplifier to provide the electrical signal to the stimulation component and the controller is also operable in accordance with a second operational setting to use the second amplifier to provide the electrical signal to the stimulation component. Generally, the first amplifier provides greater signal amplification of the audio data than the second amplifier.

The present invention, a Digital Power Amplifier (DPA) with filtered output relates to the transmission circuitry of wireless communications systems and more particularly to high frequency power amplifier circuits using digital intensive techniques on cost efficient semiconductor technologies. Today, we experience an ever-increasing need for low cost, low power wireless transmitters in the millimeter wavelength region. Current solutions rely on analog PA circuits. The background art does not contain a solution for bridging the gap between the operation frequencies of the digital circuits on a cost-efficient technology such as CMOS and the millimeter wavelength transmission frequencies demanded in numerous applications. The DPA allowing the direct feeding of digital data to a high frequency amplifying circuit. In this way, design challenging and costly analog processing up-conversion stages are avoided. The DPA comprises a bank of switching amplifying elements, a switch capacitor trap filter taping on the bank of switching amplifying elements for shaping the frequency characteristic of the produced radio frequency (RF) waveform and an adaptive biasing circuit able of dynamically controlling the power consumption within the switching amplifying elements. It can have a wide spectrum of applications where low cost but high efficiency power amplifiers are needed, such as in the Internet of Things (IoT), Wi-Fi and 5G cellular communications.

A Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and first and second peaking amplifier dies. The RF signal splitter divides an input RF signal into first, second, and third input RF signals, and conveys the input RF signals to splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier dies each include one or more additional power transistors configured to amplify, along first and second peaking signal paths, the second and third input RF signals to produce amplified second and third RF signals. The dies are coupled to the substrate so that the RF signal paths through the carrier and one or more of the peaking amplifier dies extend in substantially different (e.g., orthogonal) directions.

An active noise source apparatus includes a pair of a first and second switched-biased noise amplifier branches (22, 23). A directional coupler (24) having a pair of input ports (3, 4) connected to combine the noise outputs from the first and second switched-biased noise amplifiers. One output port (4) of the directional coupler (24) is connected to a matched termination (Rtermination) and another output port (2) of the directional coupler (24) is connected to an output (25) of the active noise source.

A power amplification apparatus, a remote radio unit, and a base station are provided to improve power amplification efficiency. The power amplification apparatus includes an envelope modulator, a main power amplifier, and a first auxiliary power amplifier. The envelope modulator is configured to obtain an envelope voltage based on a received envelope signal and output the envelope voltage to the drain of the main power amplifier. The main power amplifier is connected to the envelope modulator and configured to use the envelope voltage as an operating voltage, and is connected to the first auxiliary power amplifier, to output the envelope voltage to a drain of the first auxiliary power amplifier. The first auxiliary power amplifier is configured to use the envelope voltage received from the main power amplifier as an operating voltage.

Included is a compensation circuit having one end connected to another end of a first output circuit and another end of a second output circuit and another end grounded, the compensation circuit having an electrical length of 90 degrees at a first operation frequency and an electrical length of 45 degrees at a second operation frequency which is half of the first operation frequency.

This power supply circuit is configured to supply power to an amplifier and includes: a power supply line extending by branching from a signal line through which a signal inputted to the amplifier is transferred or a signal outputted from the amplifier is transferred; and a capacitive element having one end connected to a distal end of the power supply line, and another end grounded, the capacitive element leading the signal to a ground, wherein a base end of the power supply line is a branch portion at which the power supply line branches from the signal line, and a line length of the power supply line extending from the branch portion to the distal end is shorter than λ/4, where λ, is a wavelength of the signal.

A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.

To easily adjust a gain of an amplifier. An applied input signal is input to a gate terminal of a first transistor, and a current depending on the applied input signal flows through the first transistor. A load section is connected to a drain terminal of the first transistor. A gate terminal of a second transistor is connected to the load section, and a current depending on a change in a voltage of the drain terminal of the first transistor flows through the second transistor. A source terminal of the first transistor and a drain terminal of the second transistor are connected in common to a first resistance, and the current from the first transistor and the current from the second transistor flow through the first resistance. A third transistor supplies a current approximately equal to the current of the second transistor. The current supplied by the third transistor is output from an output end.

There is provided a method and system for linear signal processing with signal decomposition. The system including: a decomposition module to receive an analog input signal and perform signal decomposition, the signal decomposition including slicing the analog input signal into a plurality of slices to produce one or more analog components and one or more digital components, the decomposition module directing each component to a separate signal path; and a processing module to perform one or more linear operations on at least one of the signal paths. In some cases, the signal decomposition includes slicing the analog input signal into the plurality of slices by amplitude. In some cases, the analog components include unsaturated slices of the analog input signal and the digital components include saturated slices of the analog input signal.