Power amplifier (PA) devices and methods for fabricating PA devices containing inverted power transistor dies are disclosed. In embodiments, the PA device includes a first set of input and output leads, an inverted first power transistor (e.g., peaking) die electrically coupled between the first set of input and output leads, and a base flange. The inverted first power die includes, in turn, a die body having a die frontside and a die backside opposite the die frontside. A power transistor having a first contact region is formed in the die frontside. A frontside layer system is formed over the die frontside and the power transistor, while an electrically-conductive bond layer attaches the inverted first power transistor die to the base flange. The first contact region of the power transistor is electrically coupled to the base flange through the electrically-conductive bond layer and through the frontside layer system.

A packaged RF power amplifier (RFPA) configured to increase video bandwidth is disclosed as well is a process for implementing a RF power device to increase video bandwidth. The RF power device including at least one transistor; an output matching circuit coupled to an output lead and to the at least one transistor; at least one bias feed circuit coupled to the at least one transistor; and at least one coaxial resonator coupled between the at least one transistor and the at least one bias feed circuit.

The eddy current flaw detection apparatus includes: a pair of detecting coils 10a, 10b arranged in coaxial and spaced relation with a specimen 3; and a bridge circuit two sides of which are constituted by the detecting coils so that magnetic fields generated by these detecting coils 10a, 10b are in opposite phases to each other. A pair of exciting coils 11a, 11b are arranged coaxially with the detecting coils 10a, 10b in a manner to sandwich the pair of detecting coils 10a, 10b therebetween. A distance D between the detecting coil and the exciting coil adjacent thereto is set to a distance where a vibrational noise signal excited in the exciting coil and detected by its adjacent detecting coil is in opposite phase to that of a vibrational noise signal excited in the detecting coil and detected by the detecting coil.

A power amplifier for a radio frequency transceiver including a driver, a disable circuit, and a bias circuit. The driver includes a source node for receiving a drive voltage when enabled and includes an output node that is susceptible to strong blocker signals when disabled. The bias circuit includes first and second bias nodes for driving the voltage level of the source and output nodes, respectively, to suitable bias voltage levels to minimize impact of blocker signals. The disable circuit includes switch circuits to couple the driver to the bias circuit in the disable mode. The bias circuit may include at least one voltage source. The bias circuit may be coupled to a supply voltage and may include a voltage divider coupled between the source and output nodes. The bias circuit may include a source-follower circuit to isolate the bias voltages from variations of the supply voltage.

A first amplifier circuit in a preceding stage, a second amplifier circuit in a subsequent stage, and a ground external connection terminal are disposed on a substrate. The first and second amplifier circuits each include bipolar transistors, capacitive elements for the respective bipolar transistors, and resistive elements for the respective bipolar transistors. The bipolar transistors each include separate base electrodes, that is, a first base electrode for radio frequency and a second base electrode for biasing. The bipolar transistors of the second amplifier circuit include emitter electrodes connected to the ground external connection terminal. The minimum spacing between the first base electrode and an emitter mesa layer of at least one of the bipolar transistors of the second amplifier circuit is greater than the minimum spacing between the first base electrode and am emitter mesa layer of each of the bipolar transistors of the first amplifier circuit.

An apparatus for high-power combining includes multiple power-combining building blocks, a passive input network to couple one or more input signals to one or more input ports of the multiple power-combining building blocks, and a passive output network to couple to output ports of the multiple power-combining building blocks and to generate one or more amplified output signals. Each power-combining building block includes M high-power amplifiers (HPAs) coupled in parallel to a respective passive input network and a respective passive output network. A count of the multiple power-combining building blocks is determined based on a desired total number N of the HPAs and a number M of the HPAs in each power-combining building block.

An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

A radio frequency circuit includes: an amplifier circuit configured to amplify a first radio frequency signal using a first power supply voltage, and amplify a second radio frequency signal using a second power supply voltage. The first radio frequency signal is a signal in a first band for Long Term Evolution (LTE), the second radio frequency signal is a signal in a second band for 5th Generation New Radio (5G NR) or a wireless local area network (WLAN) signal, and in a state in which a first predetermined condition regarding the first radio frequency signal and the second radio frequency signal is satisfied, a value of the second power supply voltage is greater than a value of the first power supply voltage.

An autotuning controller is provided for improving power efficiency and linearity of digital power amplifiers (DPAs). The controller includes an interface including input and output terminals connected to the DPAs, the interface being configured to acquire input signals and output signals, a digital pre-distortion (DPD)-DPA adaptive controller including a processor and a memory running and storing a DPD algorithm, an efficiency enhancement method and a learning cost function. The DPD adaptive controller is configured to perform steps of computing DPD coefficients to define a learning cost function based on a DPD model by use of a data-driven optimization method, wherein the leaning cost function includes both variables of a DDA performance and a DPD performance, updating the learning cost function based on the DPD performance, optimizing the updated learning cost function by solving the updated learning cost function with respect to the variables of the DDA performance, and providing optimal parameters for DPA and DPD via the interface.

Method of operating a power combiner network (1), the power combiner network (1) comprising a power combiner device (10) having N secondary ports (11(1, 2, N)) combining into one primary port (12), wherein respective N secondary port (11(1, 2, . . . , N)) is provided with a phase shifter arrangement (13) and a load control arrangement (14). Respective phase shifter arrangement (13) is configured to set a phase of a signal fed through respective N secondary port (11(1, 2, . . . , N)). Respective load control arrangement (14) is configured to set the N secondary ports (11(1, 2, . . . , N)) in an active or in an inactive operation mode. For I inactive secondary ports (11(1)) the load control arrangement (14) is further configured to set a phase of the signal reflected from the I inactive secondary ports (11(1)). The method comprises the method steps of; step A (100), selecting which of the N secondary ports (11(1, 2, . . . , N)) that should be set in an inactive operation mode and which of the N secondary ports (11(1, 2, . . . , N)) that should be set in an active operation mode, step B (110), setting selected I inactive secondary ports (11(1)) in an inactive operation mode by means of the load control arrangement (14), step C (120), retrieving a phase required for respective I inactive secondary port (11(1)) and retrieving a phase required for respective A active secondary port (11(2)) in order for respective A active secondary port (11(2)) to minimize the reflected signal from the power combiner device (10) and provide desired power to the primary port (12), step D (130), setting respective load control arrangement (14) for respective I inactive secondary port (11(1)) according to respective retrieved phase, and step E (140), setting respective phase shifter arrangement (13) for respective A active secondary port (11(2)) according to respective retrieved phase.