Patent classifications
H03F3/211
POWER AMPLIFIER FAULT DETECTOR
Herein disclosed in some embodiments is a fault detector for power amplifiers of a communication system. The fault detector can detect a portion of the power amplifiers that are in fault condition and can prevent or limit current flow to the power amplifiers in fault condition while allowing the rest of the power amplifiers to operate normally. The fault detector can further indicate which power amplifiers are in fault condition and/or the cause for the power amplifiers to be in fault condition. Based on the indication, a controller can direct communications away from the power amplifiers in fault condition and/or perform operations to correct the fault condition.
Radio frequency (RF) amplifier
Embodiments of a device and method are disclosed. In an embodiment, an RF amplifier includes first and second RF signal paths having RF input interfaces, RF output interfaces, and corresponding transistors connected between the respective RF input interfaces and RF output interfaces, wherein control terminals of the transistors are connected to the RF input interfaces and current conducting terminals of the transistors are connected to the corresponding RF output interfaces. The RF amplifier including a conductive path between the current conducting terminal of the first transistor and the current conducting terminal of the second transistor, wherein the conductive path includes a first inductance, a second inductance, and a capacitance electrically connected between the first inductance and the second inductance.
POWER AMPLIFIER CIRCUIT
A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.
LOW-LOAD-MODULATION BROADBAND AMPLIFIER
Low-load-modulation, broadband power amplifiers and method of use are described. The amplifiers can include multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see low modulation of its load between the fully-on and fully backed-off states of the amplifier. With lower load modulation, the power amplifiers described herein exhibit better power-handling capability and RF fractional bandwidth as compared to conventional amplifiers.
POWER AMPLIFIER PACKAGES CONTAINING MULTI-PATH INTEGRATED PASSIVE DEVICES
Power amplifier (PA) packages, such as Doherty PA packages, containing multi-path integrated passive devices (IPDs) are disclosed. In embodiments, the PA package includes a package body through which first and second signal amplification paths extend, a first amplifier die within the package body and positioned in the first signal amplification path, and a second amplifier die within the package body and positioned in the second signal amplification path. A multi-path IPD is further contained in the package body. The multi-path IPD includes a first IPD region through which the first signal amplification path extends, a second IPD region through which the second signal amplification path extends, and an isolation region formed in the IPD substrate a location intermediate the first IPD region and the second IPD region.
Integrated multiple-path power amplifier with interdigitated transistors
A multiple-path amplifier (e.g., a Doherty amplifier) includes first and second amplifier input terminals and an amplifier output terminal integrally-formed with a semiconductor die, and at least two amplifier cells positioned adjacent to each other between the amplifier input terminals and the amplifier output terminal. Each amplifier cell includes first and second transistors (e.g., field effect transistors) integrally-formed with the semiconductor die, where the first and second transistors each include a transistor input (e.g., a gate terminal) and a transistor output (e.g., a drain terminal). The first transistor input is coupled to the first amplifier input terminal, and the second transistor input is coupled to the second amplifier input terminal. A combining node is coupled to the second transistor output and to the amplifier output terminal, and a first phase shift element (e.g., an inductor) is electrically connected between the first transistor output and the combining node.
SYSTEMS AND METHODS FOR SPLIT-FREQUENCY AMPLIFICATION
A system for split-frequency amplification, preferably including: one or more primary-band amplification stages, one or more secondary-band amplification stages, one or more band-splitting filters, and/or one or more signal couplers. An analog canceller including one or more split-frequency amplifiers. A mixer including one or more split-frequency amplifiers. A voltage-controlled oscillator including one or more split-frequency amplifiers. A method for split-frequency amplification, preferably including: receiving an input signal, separating the input signal into signal portions, and/or amplifying the signal portions, and optionally including combining the amplified signal portions and/or providing one or more output signals.
SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus capable of removing signal interference between reactors includes: a first reactor, a second reactor adjacent to the first reactor, and a power generator configured to supply first power to the first reactor and supply second power to the second reactor, wherein the power generator is further configured to synchronize phases of the first power and the second power.
ANTENNA MODULE AND ELECTRONIC DEVICE USING THE SAME
A portable communication device includes a processor positioned in a first printed circuit board; a communication circuit; and an antenna module. The antenna module includes a second printed circuit board; a first antenna and a second antenna positioned in the second printed circuit board; a first transmission-reception circuit positioned in the second printed circuit board. The first transmission-reception circuit comprises a power amplifier for amplifying a signal to be transmitted through the first antenna, and a first low noise amplifier for amplifying a signal received through the first antenna. The power amplifier forms a portion of a transmission path electrically connected with the communication circuit and the first antenna. The first low noise amplifier forms a portion of a first reception path electrically connected with the communication circuit and the first antenna. The transmission path or the first reception path in the first transmission-reception circuit is selectively provided by the communication circuit. The portable communication device also includes a first reception circuit positioned in the second printed circuit board, wherein the first reception circuit does not comprise a power amplifier for amplifying a signal to be transmitted through the second antenna, and comprises a second low noise amplifier for amplifying a signal received through the second antenna, the second low noise amplifier forming a portion of a second reception path electrically connected with the communication circuit and the second antenna.
Switchable power amplification structure
The present disclosure relates to a switchable power amplification structure including a first power amplifier (PA), a second PA, a front switching structure, and an end switching structure. The front switching structure is coupled to a radio frequency (RF) input port, and the end switching structure is coupled to an antenna port. Herein, the first PA and the second PA are parallel to each other, each of which is coupled between the front switching structure and the first end switching structure. The front switching structure is configured to selectively couple the first PA and the second PA to the RF input port, while the end switching structure is configured to selectively couple the first PA and the second PA to the first antenna port.