H03F3/211

POWER AMPLIFIER CIRCUIT
20210075369 · 2021-03-11 ·

A power amplifier circuit includes a first path and a second path between an input terminal and an output terminal, a first amplifier located in the first path operative in a first mode, a second amplifier located in the second path operative in a second mode, a first matching circuit between the first amplifier and the output terminal in the first path, a first capacitor having a first end connected to the output terminal side of the first matching circuit, and a second end, a first inductor having a first end connected to the second end of the first capacitor and a second end grounded, and a short-circuit switch connected in parallel with the first inductor. The short-circuit switch short-circuits the first and second ends of the first inductor in the first mode and is placed in an open-circuit position in the second mode.

INTEGRATED CIRCUIT DEVICES WITH PARALLEL POWER AMPLIFIER OUTPUT PATHS
20210075371 · 2021-03-11 ·

An integrated circuit device is provided. In some examples, the integrated circuit device includes a first amplifier path, a second amplifier path coupled in parallel with the first amplifier path, a matching network coupled to the first amplifier path and the second amplifier path, and an antenna coupled to the matching network. In some such examples, the first amplifier path includes a first differential power amplifier coupled to the matching network, and the second amplifier path includes a second differential power amplifier coupled to the matching network. The integrated circuit device may further include a controller coupled to selectively enable the first amplifier path to provide a transmitter output power within a first range and to selectively enable the second amplifier path to provide a transmitter output power within a second range that is different from the first range.

SYSTEMS AND METHODS FOR SPLIT-FREQUENCY AMPLIFICATION
20210075381 · 2021-03-11 ·

A system for split-frequency amplification, preferably including: one or more primary-band amplification stages, one or more secondary-band amplification stages, one or more band-splitting filters, and/or one or more signal couplers. An analog canceller including one or more split-frequency amplifiers. A mixer including one or more split-frequency amplifiers. A voltage-controlled oscillator including one or more split-frequency amplifiers. A method for split-frequency amplification, preferably including: receiving an input signal, separating the input signal into signal portions, and/or amplifying the signal portions, and optionally including combining the amplified signal portions and/or providing one or more output signals.

LOW NOISE AMPLIFIER WITH IMPROVED LINEARITY IN LOW GAIN MODE
20210091730 · 2021-03-25 · ·

A low noise amplifier that includes a first cascode, a second cascode, an input circuit, an output node, a first switch, and a second switch. A source of a first common gate transistor and a drain of a first common source transistor of the first cascode are coupled to a first node of the low noise amplifier. The output node is coupled to a drain of the first common gate transistor, and to a drain of a second common gate transistor of the second cascode, thereby coupling the first cascode and the second cascode to a power supply via a load. The first switch is coupled between a gate of the first common gate transistor and the power supply. The second switch is coupled between the first node and the power supply. The first switch is configured to be open and the second switch is configured to be closed when the low noise amplifier operates at a first operational node. The first switch is configured to be closed and the second switch is configured to be open when the low noise amplifier operates at a second operational node that differs from the first operational mode by at least a gain of the low noise amplifier.

ANALOG PREDISTORTION (APD) SYSTEM FOR POWER AMPLIFIERS
20230421110 · 2023-12-28 ·

An analog predistortion system for power amplifiers is disclosed. In one aspect, the system may apply analog predistortion to offset memory effects that may occur as a function of frequencies that operate faster than time constants of the related circuits. In a particular aspect, the analog predistortion is applied at least to a phase of the signal to be amplified, but may also be applied to a gain of the signal to be amplified. When such memory focused analog predistortion is combined with memoryless or low depth memory digital predistortion, overall linearity and performance of the power amplifier is improved.

Modular Amplifier and Amplifier Assembly Comprising the Same
20230421106 · 2023-12-28 ·

The present invention is related to a modular amplifier comprising; an amplifier housing, said housing provided with; an amplifier power input connection, at least one amplifier signal input connection for receiving at least one input signal to be amplified, at least one amplifier signal output connection, for delivering at least one amplified signal; a plurality of amplifier modules, each module comprising: a module power connection coupled to the amplifier power input connection; a module signal input connection; a module signal output connection; amplification hardware, having an amplifying power; a controller, configured for: selectively connecting, based on an algorithm, the at least one amplifier signal input connection to one or more module signal input connections of amplifier modules, for amplifying the at least one input signal to be amplified, and connecting the module signal output connection of said one or more amplifier modules to one or more amplifier signal output connections. The invention is further related to an assembly comprising said amplifiers.

ENVELOPE TRACKING RADIO FREQUENCY FRONT-END CIRCUIT
20230421105 · 2023-12-28 ·

An envelope tracking (ET) radio frequency (RF) front-end circuit receives a single tracking signal (e.g., Vramp) from a baseband transceiver and generates a plurality of control signals (Vcc). The control signals are created by a multiple control signal generator circuit based on a calculated load estimate for each relevant power amplifier. The load estimate may be calculated from a sensed current and voltage. By providing control signals optimized for loads presented to the power amplifiers, the overall efficiency of the transmitter is improved.

Method and circuit to isolate body capacitance in semiconductor devices

Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.

Radio frequency circuit and communication device

A radio frequency circuit includes: an amplifier circuit configured to amplify a first radio frequency signal using a first power supply voltage, and amplify a second radio frequency signal using a second power supply voltage. The first radio frequency signal is a signal in a first band for Long Term Evolution (LTE), the second radio frequency signal is a signal in a second band for 5th Generation New Radio (5G NR) or a wireless local area network (WLAN) signal, and in a state in which a first predetermined condition regarding the first radio frequency signal and the second radio frequency signal is satisfied, a value of the second power supply voltage is greater than a value of the first power supply voltage.

Power amplifier module

A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.