Patent classifications
H03F3/211
AMPLIFICATION APPARATUS AND METHOD
Amplification device and processes capable of miniaturization in a device for performing linear amplification and switching amplification operations on incoming signals are provided. The amplifying device includes a first amplifying unit for amplifying an input signal and outputting a first output signal, the input switch unit connected in parallel with the first amplifying unit for performing a switching operation by an input signal and outputting a switch output signal, and a second amplifying unit for amplifying a first output signal or a switch output signal and outputting a second output signal, and the first amplifying unit or the input switch unit operates based on the type of the input signal.
RADIO FREQUENCY CIRCUIT AND COMMUNICATION DEVICE
A radio frequency circuit includes a first acoustic wave filter that is connected to a common terminal and includes a first acoustic wave resonator, a first LC filter that is connected to the common terminal via the first acoustic wave filter and includes at least one of an inductor or a capacitor, a second acoustic wave filter that is connected to the common terminal and includes a second acoustic wave resonator, and a second LC filter that is connected to the common terminal via the second acoustic wave filter and includes at least one of an inductor or a capacitor.
BALANCED-TO-DOHERTY MODE SWITCHABLE POWER AMPLIFIER
A balanced-to-Doherty (B2D) mode-reconfigurable power amplifier (PA) has the capability of maintaining high linearity and high efficiency against load mismatch. The reconfigurable PA includes a switch to alternatively connect to a pre-determined resistive load or a pre-determined pure reactive load (jX), i.e., short, open, or finite reactance between an output quadrature coupler and ground. The biasing of Doherty mode is adaptive dependent on the value of reactive loading (jX). The Doherty operation of this PA is based on an architecture configured from a balanced amplifier, e.g., a quasi-balanced amplifier.
RADIO-FREQUENCY CIRCUIT AND COMMUNICATION DEVICE
A radio-frequency circuit includes a first switch which includes a common terminal, a first selection terminal, and a second selection terminal, and switches between connecting the common terminal and the first selection terminal and connecting the common terminal and the second selection terminal; a first low-noise amplifier including an input terminal connected to the first selection terminal, and a second low-noise amplifier including an input terminal connected to the second selection terminal. The frequency band in which the first low-noise amplifier amplifies a radio-frequency signal by at least a predetermined gain includes the frequency band in which the second low-noise amplifier amplifies a radio-frequency signal by at least a predetermined gain.
Device stack with novel gate capacitor topology
Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.
Power amplifier circuit
A power amplifier circuit amplifies a radio-frequency signal in a transmit frequency band. The power amplifier circuit includes an amplifier, a bias circuit, and an impedance circuit. The amplifier amplifies power of a radio-frequency signal and outputs an amplified signal. The impedance circuit is connected between a signal input terminal of the amplifier and a bias-current output terminal of the bias circuit and has frequency characteristics in which attenuation is obtained in the transmit frequency band. The impedance circuit includes first and second impedance circuits. The first impedance circuit is connected to the signal input terminal. The second impedance circuit is connected between the first impedance circuit and the bias-current output terminal.
Voltage regulation systems and methods with adjustable boost and step-down regulation
Systems, methods, and circuitries are provided for generating supply voltages for a power amplifier in a digital envelope tracking system. In one example, a voltage generation circuitry converts a source voltage into a supply voltage based on a target voltage. The voltage regulation circuitry includes an adjustable boost circuitry that multiplies the source voltage to generate an input voltage having a voltage equal to or greater than the source voltage and a step-down regulator circuitry that regulates the input voltage to generate a regulated output voltage having a voltage that is less than or equal to the input voltage. A voltage splitter circuitry is coupled to the regulated output voltage and is configured to generate at least one derived output voltage from the regulated output voltage. A supply modulator provides a selected one of the at least one derived output voltage to a power amplifier.
SUPER-LINEAR POWER AMPLIFIERS WITH ADAPTIVE BIASING
In one aspect, a power amplifier apparatus comprising a power amplifier (PA) and an adaptive controller is provided. The PA comprises at least one transistor and the adaptive controller is configured to control a bias voltage of the transistor based on a measured power efficiency of the PA and a measure output signal quality of the PA. In another aspect, a method of optimizing PA performance is provided. The PA comprises at least one transistor and the method includes initializing a bias voltage of the transistor, receiving measurements indicating a power efficiency and an output signal quality of the PA, evaluating the received measurements, calculating a new bias voltage for the transistor based on the evaluation, and applying the calculated new bias voltage to the transistor.
Power amplification module
A power amplification module includes first and second amplifiers for first and second communication modes, a bypass line that bypasses the first or second amplifier, an input switch circuit that supplies a radio frequency signal to the first or second amplifier in accordance with a communication mode when a desired output level is equal to or greater than a reference level, and that supplies a radio frequency signal to the bypass line when the desired output level is less than the reference level, and an output switch circuit that outputs a first amplified signal from the first amplifier or a second amplified signal from the second amplifier in accordance with the communication mode when the desired output level is equal to or greater than the reference level, and that outputs a radio frequency signal output from the bypass line when the desired output level is less than the reference level.
Power amplifier circuit
A power amplifier circuit includes lower-stage and upper-stage differential amplifying pairs, a combiner, first and second inductors, and first and second capacitors. First and second signals are input into the lower-stage differential amplifying pair. The upper-stage differential amplifying pair outputs first and second amplified signals. The combiner combines the first and second amplified signals. The lower-stage differential amplifying pair includes first and second transistors. A supply voltage is supplied to the collectors of the first and second transistors. The first and second signals are supplied to the bases of the first and second transistors. The upper-stage differential amplifying pair includes third and fourth transistors. A supply voltage is supplied to the collectors of the third and fourth transistors. The emitters of the third and fourth transistors are grounded via the first and second inductors and are connected to the first and second transistors via the first and second capacitors.