Provided is a power amplifier circuit that reduces the effect of intermodulation distortion without necessarily increase in the circuit size. The power amplifier circuit includes a first amplifier that amplifies a first signal and output a second signal, an extraction circuit that extracts a second-harmonic wave included in the second signal, a phase adjustment circuit that adjusts the phase of the extracted second-harmonic wave, and a power combiner that combines the second-harmonic wave of the adjusted phase with a third signal and output the first signal.

A high frequency circuit includes a transmit terminal and a transmit and receive terminal, a power amplifier that amplifies a high frequency signal inputted from the transmit terminal and outputs the high frequency signal toward the transmit and receive terminal, and an output matching circuit that is positioned on a signal path connecting the power amplifier and the transmit and receive terminal and that optimizes the output load impedance of the power amplifier. The output matching circuit includes a matching circuit coupled to an output terminal of the power amplifier, another matching circuit, and a switch that changes a connection between the matching circuits. The power amplifier and the switch are formed at a single semiconductor IC. The matching circuits are formed outside the semiconductor IC.

A power amplifier circuit includes a first amplifier including two amplifiers connected in series with a matching circuit interposed therebetween, a first power supply circuit that supplies a first power supply voltage to a former amplifier of the first amplifier, and a second power supply circuit that supplies a second power supply voltage to a latter amplifier of the first amplifier.

A power amplifier includes a signal input unit to which an input signal is applied, an output stage that is electrically isolated from the signal input unit, where the output stage is configured to amplify an output signal of the signal input unit based on a power supply voltage from a floating power supply, a reference potential switch that is inserted between a reference node of the power supply voltage generated by the floating power supply and a reference potential line, and a feedback circuit configured to amplify a differential voltage between an output node of the output stage and the reference node, and feed the resultant voltage back to the signal input unit.

Spatial power-combining devices and, in particular, spatial power-combining devices with filtering elements are disclosed. A spatial power-combining device includes a plurality of amplifier assemblies and each amplifier assembly includes an input antenna structure, an amplifier, an output antenna structure, and a filtering element. A filtering element may be an integral single component with an input signal conductor of the input antenna structure or an integral single component with an output signal conductor of the output antenna structure. In some aspects, a filtering element may be an integral single component with both the input signal conductor and the output signal conductor.

An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common-mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.

A multi-voltage generation circuit and related envelope tracking (ET) amplifier apparatus is provided. In one aspect, a multi-voltage generation circuit is configured to generate a number of ET target voltages based on an analog voltage signal. In another aspect, a multi-amplifier ET circuit can be configured to include a number of amplifier circuits for amplifying concurrently a radio frequency (RF) signal based on a number of ET voltages. The multi-amplifier ET circuit also includes a number of driver circuits configured to generate the ET voltages base on a number of ET target voltages. In this regard, the multi-voltage generation circuit can be provided in the multi-amplifier ET circuit to generate the ET target voltages based on the analog voltage signal that corresponds to the RF signal. In examples discussed herein, the driver circuits are co-located with the amplifier circuits to help improve efficiency and maintain linearity in the amplifier circuits.

Wideband power combiners and splitters are provided herein. In certain embodiments, a power combiner/splitter is implemented with a first coil connecting a first port and a second port, and a second coil connecting a third port and a fourth port. The first coil and the second coil are inductively coupled to one another. For example, the first coil and the second coil can be formed using adjacent conductive layers of a semiconductor chip, an integrated passive device, or a laminate. The power combiner/splitter further includes a fifth port tapping a center of the first coil and a sixth port tapping a center of the second coil. The fifth port and the sixth port serve to connect capacitors and/or other impedance to the center of the coils to thereby provide wideband operation.

A method and an apparatus are provided for calibrating digital pre-distortion (DPD) of an electronic device. A respective signal is received, by each of a first plurality of receiving antennas, from each of a second plurality of transmitting antennas. A DPD function is determined for each of the second plurality of transmitting antennas based on the received signals. A combined DPD function of the second plurality of transmitting antennas is determined based on the DPD functions and phase shifter settings associated with the second plurality of transmitting antennas.

A multi-bandwidth envelope tracking (ET) integrated circuit (IC) (ETIC) and related apparatus are provided. In a non-limiting example, the multi-bandwidth ETIC is coupled to an amplifier circuit(s) configured to amplify a radio frequency (RF) signal corresponding to a wide range of modulation bandwidth (e.g., from less than 90 KHz to over 40 MHz). In this regard, the multi-bandwidth ETIC is configured to generate different ET voltages based on the modulation bandwidth of the RF signal. By generating the ET voltages based on the modulation bandwidth of the RF signal, it may be possible to optimize operating efficiency of the amplifier circuit(s). As a result, it may be possible to improve power consumption and reduce heat dissipation in an apparatus employing the multi-bandwidth ETIC, thus making it possible to provide the multi-bandwidth ETIC in a wearable device.