H03F3/213

FRONT-END FOR PROCESSING 2G SIGNAL USING 3G/4G PATHS

Front-end for processing 2G signal using 3G/4G paths. In some embodiments, a front-end architecture can include a first amplification path and a second amplification path, with each being configured to amplify a 3G/4G signal, and the first amplification path including a phase shifting circuit. The front-end architecture can further include a splitter configured to receive a 2G signal and split the 2G signal into the first and second amplification paths, and a combiner configured to combine amplified 2G signals from the first and second amplification paths into a common output path. The front-end architecture can further include an impedance transformer implemented along the common output path to provide a desired impedance for the combined 2G signal.

FRONT-END FOR PROCESSING 2G SIGNAL USING 3G/4G PATHS

Front-end for processing 2G signal using 3G/4G paths. In some embodiments, a front-end architecture can include a first amplification path and a second amplification path, with each being configured to amplify a 3G/4G signal, and the first amplification path including a phase shifting circuit. The front-end architecture can further include a splitter configured to receive a 2G signal and split the 2G signal into the first and second amplification paths, and a combiner configured to combine amplified 2G signals from the first and second amplification paths into a common output path. The front-end architecture can further include an impedance transformer implemented along the common output path to provide a desired impedance for the combined 2G signal.

MICROPHONE ASSEMBLY WITH REDUCED NOISE

A microphone assembly comprising: a housing including a base, a cover, and a sound port; a MEMS transducer element disposed in the housing, the transducer element configured to convert sound into a microphone signal voltage at a transducer output; and a processing circuit. The processing circuit comprising a transconductance amplifier comprising an input node connected to the transducer output for receipt of the microphone signal voltage, the transconductance amplifier being configured to generate an amplified current signal representative of the microphone signal voltage in accordance with a predetermined transconductance of the transconductance amplifier; and an analog-to-digital converter comprising an input node connected to receive the amplified current signal, said analog-to-digital converter being configured to sample and quantize the amplified current signal to generate a corresponding digital microphone signal.

MICROPHONE ASSEMBLY WITH REDUCED NOISE

A microphone assembly comprising: a housing including a base, a cover, and a sound port; a MEMS transducer element disposed in the housing, the transducer element configured to convert sound into a microphone signal voltage at a transducer output; and a processing circuit. The processing circuit comprising a transconductance amplifier comprising an input node connected to the transducer output for receipt of the microphone signal voltage, the transconductance amplifier being configured to generate an amplified current signal representative of the microphone signal voltage in accordance with a predetermined transconductance of the transconductance amplifier; and an analog-to-digital converter comprising an input node connected to receive the amplified current signal, said analog-to-digital converter being configured to sample and quantize the amplified current signal to generate a corresponding digital microphone signal.

INTEGRATED DOHERTY POWER AMPLIFIER

Integrated Doherty power amplifiers are provided herein. In certain implementations, a Doherty power amplifier includes a carrier amplification stage that generates a carrier signal, a peaking amplification stage that generates a peaking signal, and an antenna structure that combines the carrier signal and the peaking signal. The antenna structure radiates a transmit wave in which the carrier signal and the peaking signal are combined with a phase shift.

INTEGRATED DOHERTY POWER AMPLIFIER

Integrated Doherty power amplifiers are provided herein. In certain implementations, a Doherty power amplifier includes a carrier amplification stage that generates a carrier signal, a peaking amplification stage that generates a peaking signal, and an antenna structure that combines the carrier signal and the peaking signal. The antenna structure radiates a transmit wave in which the carrier signal and the peaking signal are combined with a phase shift.

POWER MANAGEMENT SYSTEMS AND METHODS RELATED TO A PLURALITY OF CONVERTERS FOR PROVIDING DUAL INTEGRATED MULTI-MODE POWER MANAGEMENT
20240106333 · 2024-03-28 ·

A power management device is disclosed, including a first DC-DC converter coupled to a first output voltage line, a second DC-DC converter coupled to a second output voltage line, a first set of switches associated with the first DC-DC converter, and a second set of switches associated with the second DC-DC converter. The power management device may further include a controller configured to toggle one or more switches of the first set of switches and one or more switches of the second set of switches, and a multi-mode radio-frequency front-end block communicatively coupled to the controller.

POWER MANAGEMENT SYSTEMS AND METHODS RELATED TO A PLURALITY OF CONVERTERS FOR PROVIDING DUAL INTEGRATED MULTI-MODE POWER MANAGEMENT
20240106333 · 2024-03-28 ·

A power management device is disclosed, including a first DC-DC converter coupled to a first output voltage line, a second DC-DC converter coupled to a second output voltage line, a first set of switches associated with the first DC-DC converter, and a second set of switches associated with the second DC-DC converter. The power management device may further include a controller configured to toggle one or more switches of the first set of switches and one or more switches of the second set of switches, and a multi-mode radio-frequency front-end block communicatively coupled to the controller.

Symmetric layout for high-voltage amplifier

A packaged semiconductor die may include a package terminal array comprising a plurality of terminals, wherein a spacing between the plurality of terminals of the ball grid array is less than 0.5 mm. First and second high-voltage circuits of the die may output a differential signal to a first and second terminal that may exceed 15 volts, in which the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically around an axis and in which the first terminal and the second terminal are located at an edge of the package terminal array. A low-voltage circuit may be coupled to a third terminal and positioned between the first high-voltage circuit and the second high-voltage circuit, wherein the low-voltage circuit comprises circuitry organized in columns aligned along an axis and having a width defined by a fraction of the terminal spacing pitch.

RADIO FREQUENCY CIRCUIT AND COMMUNICATION DEVICE

A radio frequency circuit includes a carrier amplifier, a peak amplifier, a transformer, and an impedance converting circuit. One end of an input coil is connected to an output of the carrier amplifier, one end of an output coil is connected to an output terminal. The impedance converting circuit includes main and auxiliary lines. One end of the main line is connected to an output of the peak amplifier, and the other end of the main line is connected to the other end of the input coil. One end of the auxiliary line is connected to the one end of the main line, and the other end of the auxiliary line is connected to ground. A first direction from the one end to the other end of the main line, and a second direction from the other end to the one end of the auxiliary line (302) are the same.