Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

A power amplification module includes first and second amplifiers for first and second communication modes, a bypass line that bypasses the first or second amplifier, an input switch circuit that supplies a radio frequency signal to the first or second amplifier in accordance with a communication mode when a desired output level is equal to or greater than a reference level, and that supplies a radio frequency signal to the bypass line when the desired output level is less than the reference level, and an output switch circuit that outputs a first amplified signal from the first amplifier or a second amplified signal from the second amplifier in accordance with the communication mode when the desired output level is equal to or greater than the reference level, and that outputs a radio frequency signal output from the bypass line when the desired output level is less than the reference level.

A power amplification module includes first and second amplifiers for first and second communication modes, a bypass line that bypasses the first or second amplifier, an input switch circuit that supplies a radio frequency signal to the first or second amplifier in accordance with a communication mode when a desired output level is equal to or greater than a reference level, and that supplies a radio frequency signal to the bypass line when the desired output level is less than the reference level, and an output switch circuit that outputs a first amplified signal from the first amplifier or a second amplified signal from the second amplifier in accordance with the communication mode when the desired output level is equal to or greater than the reference level, and that outputs a radio frequency signal output from the bypass line when the desired output level is less than the reference level.

Methods of forming a thin-film piezoelectric acoustic filter, a GaN-channel/buffer Bragg reflector, and a monolithically integrated GaN HEMT PA and CMOS over a [111] crystal orientation Si handle of a SOI wafer and resulting devices are provided. Embodiments include providing a SOI wafer including a [111] crystal orientation Si handle, a BOX layer, and a top Si layer; forming a CMOS device over the top Si layer; and forming a Bragg reflector over the [111] crystal orientation Si handle wafer, the Bragg reflector including a GaN stack with alternating layers of high/low acoustic impedance.

Aspects and examples described herein provide a radio-frequency switching circuit, switching device, and related methods. In one example, a radio-frequency switching device includes an input path configured to receive a radio-frequency signal, a plurality of output paths each configured to provide the radio-frequency signal, and a plurality of radio-frequency sub-networks each coupled to the input path and configured to direct the radio-frequency signal, each of the plurality of sub-networks including at least a first radio-frequency circuit having a first series of directly biased transistors, a second radio-frequency circuit having a second series of directly biased transistors, and a direct current blocking network interposed between the first radio-frequency circuit and the second radio-frequency circuit, each output path of the plurality corresponding to at least one of the plurality of radio-frequency sub-networks.

Aspects and examples described herein provide a radio-frequency switching circuit, switching device, and related methods. In one example, a radio-frequency switching device includes an input path configured to receive a radio-frequency signal, a plurality of output paths each configured to provide the radio-frequency signal, and a plurality of radio-frequency sub-networks each coupled to the input path and configured to direct the radio-frequency signal, each of the plurality of sub-networks including at least a first radio-frequency circuit having a first series of directly biased transistors, a second radio-frequency circuit having a second series of directly biased transistors, and a direct current blocking network interposed between the first radio-frequency circuit and the second radio-frequency circuit, each output path of the plurality corresponding to at least one of the plurality of radio-frequency sub-networks.

An output driver with programmable single-ended and differential outputs includes a first switch, a first output attenuator, and a programmable attenuator. The first switch is coupled in a shunt configuration to a first path of a differential output of a first amplifier. The first output attenuator is included in the first path and is coupled to the first switch in accordance with the shunt configuration. The programmable attenuator is included in a second path of the differential output of the first amplifier.

An output driver with programmable single-ended and differential outputs includes a first switch, a first output attenuator, and a programmable attenuator. The first switch is coupled in a shunt configuration to a first path of a differential output of a first amplifier. The first output attenuator is included in the first path and is coupled to the first switch in accordance with the shunt configuration. The programmable attenuator is included in a second path of the differential output of the first amplifier.

Methods of forming a thin-film piezoelectric acoustic filter, a GaN-channel/buffer Bragg reflector, and a monolithically integrated GaN HEMT PA and CMOS over a [111] crystal orientation Si handle of a SOI wafer and resulting devices are provided. Embodiments include providing a SOI wafer including a [111] crystal orientation Si handle, a BOX layer, and a top Si layer; forming a CMOS device over the top Si layer; and forming a Bragg reflector over the [111] crystal orientation Si handle wafer, the Bragg reflector including a GaN stack with alternating layers of high/low acoustic impedance.

Certain aspects of the present disclosure provide methods and apparatus for generating an envelope tracking power supply voltage. For example, certain aspects of the present disclosure provide an envelope tracking power supply having a linear amplifier having an output coupled to a power supply node of an amplifier, wherein a power supply node of the linear amplifier is coupled to a first voltage supply node. The envelope tracking power supply may also include a switch mode power supply having an output coupled to the power supply node of the amplifier. Certain aspects also include a circuit having a first switch coupled to the first voltage supply node and a second switch coupled to a second voltage supply node, wherein a power supply node of the switch mode power supply is coupled to the first switch and the second switch.