Peak maximum current control for a wireless communication device. One example provides a radio including a radio frequency power amplifier (RFPA) and a current measuring circuit configured to sense a current provided to the RFPA. A comparator is connected to the current measuring circuit. The comparator is configured to compare a value indicative of the current provided to the RFPA to a threshold and provide an output indicative of the comparison. The radio includes a switching circuit configured to receive the output from the comparator and generate an amount of attenuation based on the output. A Cartesian feedback loop is configured to receive the amount of attenuation and control the output of the RFPA.

A power amplifier device includes an amplification path implemented within a power amplifier package. The amplification path includes input and output package leads, a transistor die with transistor input and output terminals and a power transistor, and a two-stage input impedance matching circuit electrically coupled between the input package lead and the transistor input terminal. The two-stage input impedance matching circuit has a double T-match topology that includes a first resonator coupled to the first input package lead, and a second resonator coupled between the first resonator and the transistor input terminal. The amplification path also includes an output impedance matching circuit coupled between the transistor output terminal and the first output package lead, and a second output harmonic termination circuit coupled to the first output package lead.

A power amplifier device includes an amplification path implemented within a power amplifier package. The amplification path includes input and output package leads, a transistor die with transistor input and output terminals and a power transistor, and a two-stage input impedance matching circuit electrically coupled between the input package lead and the transistor input terminal. The two-stage input impedance matching circuit has a double T-match topology that includes a first resonator coupled to the first input package lead, and a second resonator coupled between the first resonator and the transistor input terminal. The amplification path also includes an output impedance matching circuit coupled between the transistor output terminal and the first output package lead, and a second output harmonic termination circuit coupled to the first output package lead.

Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.

A bias circuit for a PA. A first transistor has its drain terminal and its gate terminal connected to a first circuit node and its source terminal connected to a first supply terminal, a first current source connected to the first circuit node, and a first resistor connected between the first and second circuit nodes. A second transistor receives a first component of a differential input signal to the PA at its gate terminal, has its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal, and a third transistor receives a second component of the differential input signal to the PA at its gate terminal, having its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal. The gates terminals of the second and the third transistors are biased by a first voltage.

In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.

In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.

Supporting suppression of distortion caused by a power amplifier, PA, included in a transmitter system configured to perform digital predistortion, DPD, and feedforward, FF, linearization on multiple digital input signals relating to different frequency bands, respectively. The PA is used for power amplification in preparation for transmission by a wireless communication network and is operative with an instantaneous bandwidth, IBW. Information is obtained identifying one or more intermodulation, IM, components outside the frequency bands but within the IBW, and caused by said PA. The identified IM components are selectively processed as part of said DPD to thereby suppress formation of at least some of the identified IM components, and/or as part of the FF linearization by adding reference signals to the FF linearization, which reference signals correspond to at least some of the identified IM components.

A power amplifier circuit includes: a variable power splitter circuit that splits a first signal into a second and a third signal, the third signal being out of phase with the second signal, and increases or decreases first power of the third signal in response to a control signal; a carrier circuit including carrier amplifiers, the carrier circuit amplifies the second signal and output the amplified second signal; a peaking circuit including one or more peaking amplifiers, the peaking circuit amplifies the third signal and outputs the amplified third signal; and a control circuit that outputs to the variable power splitter circuit the control signal based on a saturation level of a target carrier amplifier, the target carrier amplifier being a carrier amplifier positioned closest to the output among the one or more carrier amplifiers in the carrier circuit.

There are included a first amplifier and a second amplifier electrically connected to a stage subsequent to the first amplifier, a third amplifier and a fourth amplifier electrically connected to a stage subsequent to the third amplifier, a phase shifter that makes a phase of a radio-frequency signal passing through a first path different from a phase of a radio-frequency signal passing through a second path, a first bias circuit that supplies a bias to the first amplifier and the third amplifier, a second bias circuit that supplies a bias to the first amplifier and the second amplifier, and a third bias circuit that supplies a bias to the third amplifier and the fourth amplifier. The second amplifier includes a second transistor, the fourth amplifier includes a fourth transistor, the second bias circuit includes a sixth transistor, and the third bias circuit includes a seventh transistor.