A packaged module for use in a wireless communication device has a substrate supporting a crystal assembly and a first die that implements at least a portion of a radio frequency baseband subsystem. The crystal assembly, positioned between the first die and the substrate, includes a crystal, an input terminal configured to receive a first signal, an output terminal configured to output a second signal, a conductive pillar, and an enclosure configured to enclose the crystal, where the conductive pillar is formed at least partially within a side of the enclosure and extends from a top surface to a bottom surface of the enclosure. The conductive pillar conducts a third signal distinct from the first and second signals.

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

A filter includes a longitudinally coupled resonator device, a parallel arm resonator, and a variable frequency circuit. The parallel arm resonator is connected between a ground and a node provided on a path connecting input-output terminals. The variable frequency circuit is connected to the first parallel arm resonator. The longitudinally coupled resonator device includes three or more odd-number IDT electrodes, an odd-numbered IDT terminal, and an even-numbered IDT terminal. The even-numbered IDT terminal is a first signal terminal connected to at least one IDT electrode located at an even-numbered position from an edge of an arrangement order of the plural IDT electrodes. The odd-numbered IDT terminal is a second signal terminal connected to two or more IDT electrodes located at odd-numbered positions from the edge. The longitudinally coupled resonator device is disposed so that the even-numbered IDT terminal is connected to the node.

A filter includes a longitudinally coupled resonator device, a parallel arm resonator, and a variable frequency circuit. The parallel arm resonator is connected between a ground and a node provided on a path connecting input-output terminals. The variable frequency circuit is connected to the first parallel arm resonator. The longitudinally coupled resonator device includes three or more odd-number IDT electrodes, an odd-numbered IDT terminal, and an even-numbered IDT terminal. The even-numbered IDT terminal is a first signal terminal connected to at least one IDT electrode located at an even-numbered position from an edge of an arrangement order of the plural IDT electrodes. The odd-numbered IDT terminal is a second signal terminal connected to two or more IDT electrodes located at odd-numbered positions from the edge. The longitudinally coupled resonator device is disposed so that the even-numbered IDT terminal is connected to the node.

A semiconductor device is provided with one or more gate fingers (20) that are provided in an active region on a semiconductor substrate (1), and a source finger (30) and a drain finger (40) that are provided in the active region and arranged alternately to allow each gate finger to be sandwiched between the source and drain fingers. The semiconductor device includes terminal circuit (60) that has inductive impedance at the frequency of a signal input to an input terminal of the one or more gate fingers, and is directly or indirectly connected to the one or more gate fingers at an area being spaced away from a connecting position of the input terminal (21a) of the one or more gate fingers (20).

A semiconductor device is provided with one or more gate fingers (20) that are provided in an active region on a semiconductor substrate (1), and a source finger (30) and a drain finger (40) that are provided in the active region and arranged alternately to allow each gate finger to be sandwiched between the source and drain fingers. The semiconductor device includes terminal circuit (60) that has inductive impedance at the frequency of a signal input to an input terminal of the one or more gate fingers, and is directly or indirectly connected to the one or more gate fingers at an area being spaced away from a connecting position of the input terminal (21a) of the one or more gate fingers (20).

A power amplifier circuit includes a first amplifier transistor, an input signal being supplied to a base of the first amplifier transistor, a first amplification signal obtained by amplifying the input signal being output from a collector of the first amplifier transistor; a first bias circuit that supplies a first current or a first voltage to the base of the first amplifier transistor; a second bias circuit that supplies a second current or a second voltage to the base of the first amplifier transistor; and a first resistor element that is connected in series between the base of the first amplifier transistor and the first bias circuit. The second bias circuit includes a diode, an impedance circuit, and a first capacitor element.

A power amplifier circuit includes a first amplifier transistor, an input signal being supplied to a base of the first amplifier transistor, a first amplification signal obtained by amplifying the input signal being output from a collector of the first amplifier transistor; a first bias circuit that supplies a first current or a first voltage to the base of the first amplifier transistor; a second bias circuit that supplies a second current or a second voltage to the base of the first amplifier transistor; and a first resistor element that is connected in series between the base of the first amplifier transistor and the first bias circuit. The second bias circuit includes a diode, an impedance circuit, and a first capacitor element.

A radio-frequency module includes a substrate, a low-noise amplifier circuit being a first amplifier circuit arranged in a first area in the substrate, a power amplifier circuit being a second amplifier circuit arranged in a second area in the substrate, and a duplexer being a component arranged between the first area and the second area in the substrate and having a heat generating property lower than that of the power amplifier circuit. The low-noise amplifier circuit includes a bias circuit configured to generate a bias current dependent on temperature characteristics of a first diode, a voltage generating circuit configured to generate a voltage dependent on temperature characteristics of a second diode as an operating voltage for the bias circuit, and an amplifier circuit configured to operate at an operating point determined by the bias current.