A GaN-based high electron mobility transistor (HEMT) device includes a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate, a drain contact and a source contact on the barrier layer, and a gate contact on the barrier layer between the drain contact and the source contact. A sheet resistance of a drain access region and/or a source access region of the semiconductor structure is between 300 and 400 ?/sq.

A GaN-based high electron mobility transistor (HEMT) device includes a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate, a drain contact and a source contact on the barrier layer, and a gate contact on the barrier layer between the drain contact and the source contact. A sheet resistance of a drain access region and/or a source access region of the semiconductor structure is between 300 and 400 ?/sq.

The present disclosure provides a method (200) for power amplifier compensation. The method (200) includes: determining (210) a compensation value for each of a plurality of power ranges; determining (220) one of the plurality of power ranges to which transmission power of an initial symbol belongs; and compensating (230) the initial symbol with the compensation value for the one power range to obtain a compensated symbol. for transmission after passing through a power amplifier.

The high voltage amplifier includes: an input circuit configured to amplify an input signal and connected to a positive-electrode-side level shift circuit and a negative-electrode-side level shift circuit; a high-voltage output circuit including a positive-electrode-side output circuit configured to amplify a signal from the positive-electrode-side level shift circuit and a negative-electrode-side output circuit configured to amplify a signal from the negative-electrode-side level shift circuit; a feedback circuit which feeds back an output signal from the high-voltage output circuit to the input signal; a detection circuit configured to detect currents of the positive-electrode-side and negative-electrode-side output circuits, and an offset adjustment circuit configured to increase an offset amount of the negative-electrode-side level shift circuit to a negative side when a current of the positive-electrode-side output circuit increases, and increase an offset amount of the positive-electrode-side level shift circuit to a positive side when a current of the negative-electrode-side output circuit increases.

The high voltage amplifier includes: an input circuit configured to amplify an input signal and connected to a positive-electrode-side level shift circuit and a negative-electrode-side level shift circuit; a high-voltage output circuit including a positive-electrode-side output circuit configured to amplify a signal from the positive-electrode-side level shift circuit and a negative-electrode-side output circuit configured to amplify a signal from the negative-electrode-side level shift circuit; a feedback circuit which feeds back an output signal from the high-voltage output circuit to the input signal; a detection circuit configured to detect currents of the positive-electrode-side and negative-electrode-side output circuits, and an offset adjustment circuit configured to increase an offset amount of the negative-electrode-side level shift circuit to a negative side when a current of the positive-electrode-side output circuit increases, and increase an offset amount of the positive-electrode-side level shift circuit to a positive side when a current of the negative-electrode-side output circuit increases.

An amplification circuit is provided. The amplification circuit may include an amplification stage configured to amplify a first signal and a second signal, and generate third and fourth signals while in a first operation period. The amplification circuit may include a latch stage configured to latch the third and fourth signals while in a in a second operation period. The amplification circuit may supply a low voltage to the amplification stage during the first operation period, the low voltage to the latch stage during the second operation period, a high voltage to the amplification stage during the first operation period, and the high voltage to the latch stage during the second operation period.

An amplification circuit is provided. The amplification circuit may include an amplification stage configured to amplify a first signal and a second signal, and generate third and fourth signals while in a first operation period. The amplification circuit may include a latch stage configured to latch the third and fourth signals while in a in a second operation period. The amplification circuit may supply a low voltage to the amplification stage during the first operation period, the low voltage to the latch stage during the second operation period, a high voltage to the amplification stage during the first operation period, and the high voltage to the latch stage during the second operation period.

Temperature compensation circuits and methods for adjusting one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA. Some embodiments compensate for PA Gain droop due to self-heating using a Sample and Hold (S&H) circuit. The S&H circuit samples and holds an initial temperature of the PA at commencement of a pulse. Thereafter, the S&H circuit generates a continuous measurement that corresponds to the temperature of the PA during the remainder of the pulse. A Gain Control signal is generated that is a function of the difference between the initial temperature and the operating temperature of the PA as the PA self-heats for the duration of the pulse. The Gain Control signal is applied to one or more adjustable or tunable circuits within a PA to offset the Gain droop of the PA.

Temperature compensation circuits and methods for adjusting one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA. Some embodiments compensate for PA Gain droop due to self-heating using a Sample and Hold (S&H) circuit. The S&H circuit samples and holds an initial temperature of the PA at commencement of a pulse. Thereafter, the S&H circuit generates a continuous measurement that corresponds to the temperature of the PA during the remainder of the pulse. A Gain Control signal is generated that is a function of the difference between the initial temperature and the operating temperature of the PA as the PA self-heats for the duration of the pulse. The Gain Control signal is applied to one or more adjustable or tunable circuits within a PA to offset the Gain droop of the PA.

One aspect of this disclosure is a power amplifier module that includes a power amplifier on a substrate and a semiconductor resistor on the substrate. The power amplifier includes a bipolar transistor having a collector, a base, and an emitter. The collector has a doping concentration of at least 310.sup.16 cm.sup.3 at an interface with the base. The collector also has at least a first grading in which doping concentration increases away from the base. The semiconductor resistor includes a resistive layer that that includes the same material as a layer of the bipolar transistor. Other embodiments of the module are provided along with related methods and components thereof.