A high-frequency module according to the present disclosure includes: an MMIC; a multilayer substrate on which the MMIC is mounted; a signal wire that is arranged above the multilayer substrate, is connected to the MMIC and is a transmission path that transmits a high-frequency signal outputted from the MMIC; and a ground wire having at least one end that is connected to a ground electrode on an upper surface of the multilayer substrate and that is arranged so as to straddle the signal wire.

Power amplification units and methods are provided, which use a combiner and an auxiliary signal to feed the power amplifier (PA) with a signal that prevents or reduces operation of higher amplification stages during off periods of the received RF signal. The PA output is delivered through an output matching circuit configured to pass the RF signal and attenuate the auxiliary signal; and the combiner combines the RF signal and the auxiliary signal through respective filters to generate the RF input signal to the PA. An auxiliary signal generator may be configured to generate the auxiliary signal with relation to the RF signal as having a frequency spectrum lower than a cutoff RF frequency. Resulting lower power consumption, particularly in case of low duty cycle RF signals, reduces heating, enables longer battery use and increases reliability performance.

Power amplification units and methods are provided, which use a combiner and an auxiliary signal to feed the power amplifier (PA) with a signal that prevents or reduces operation of higher amplification stages during off periods of the received RF signal. The PA output is delivered through an output matching circuit configured to pass the RF signal and attenuate the auxiliary signal; and the combiner combines the RF signal and the auxiliary signal through respective filters to generate the RF input signal to the PA. An auxiliary signal generator may be configured to generate the auxiliary signal with relation to the RF signal as having a frequency spectrum lower than a cutoff RF frequency. Resulting lower power consumption, particularly in case of low duty cycle RF signals, reduces heating, enables longer battery use and increases reliability performance.

Embodiments of the present disclosure provide a digital predistortion processing apparatus, where the apparatus includes an analog-to-digital conversion unit and n digital predistortion elements. The analog-to-digital conversion unit is connected to the n digital predistortion elements. Each digital predistortion element is configured to receive n input signals, perform digital predistortion processing on the n input signals, and then output n processed signals. The analog-to-digital conversion unit is configured to receive the n processed signals, perform signal extraction based on the n processed signals, and output an extracted signal, where a rate of the extracted signal is the same as a rate of each of the n processed signals. For an ultra-large-bandwidth signal, DPD correction may be performed without increasing a technical level of existing components such as an FPGA and an ADC, thereby greatly reducing implementation costs.

Embodiments of the present disclosure provide a digital predistortion processing apparatus, where the apparatus includes an analog-to-digital conversion unit and n digital predistortion elements. The analog-to-digital conversion unit is connected to the n digital predistortion elements. Each digital predistortion element is configured to receive n input signals, perform digital predistortion processing on the n input signals, and then output n processed signals. The analog-to-digital conversion unit is configured to receive the n processed signals, perform signal extraction based on the n processed signals, and output an extracted signal, where a rate of the extracted signal is the same as a rate of each of the n processed signals. For an ultra-large-bandwidth signal, DPD correction may be performed without increasing a technical level of existing components such as an FPGA and an ADC, thereby greatly reducing implementation costs.

An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.

An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.

Circuits, devices and methods related to adjustment of input signal for compensation of amplifier. In some embodiments, a control system for an amplifier can include a control circuit configured to provide a control signal based on an operating condition associated with the amplifier. The control system can further include a power adjustment component implemented along an input path associated with the amplifier and configured to adjust power of a signal to be amplified by the amplifier.

Circuits, devices and methods related to adjustment of input signal for compensation of amplifier. In some embodiments, a control system for an amplifier can include a control circuit configured to provide a control signal based on an operating condition associated with the amplifier. The control system can further include a power adjustment component implemented along an input path associated with the amplifier and configured to adjust power of a signal to be amplified by the amplifier.

A multiple-stage amplifier includes a driver stage die and a final stage die. The driver stage die includes a first type of semiconductor substrate (e.g., a silicon substrate), a first transistor, and an integrated portion of an interstage impedance matching circuit. A control terminal of the first transistor is electrically coupled to an RF signal input terminal of the driver stage die, and the integrated portion of the interstage impedance matching circuit is electrically coupled between a current-carrying terminal of the first transistor and an RF signal output terminal of the driver stage die. The second die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a second transistor. A connection, which is a non-integrated portion of the interstage impedance matching circuit, is electrically coupled between the RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die.