An amplifier having a Radio Frequency (RF) power level detector circuit for producing a control signal in accordance with a power level of an RF input signal. The control signal indicates whether the power level of the input signal is within a predetermined range of power levels greater than zero. A bias circuit is fed by the control signal, for producing a fixed bias voltage at a gate electrode of a field effect transistor (FET) to establish a predetermined quiescent current for the FET when the control signal indicates the power level of the RF input signal is within the predetermined range of power levels and to reduce the bias voltage to reduce the predetermined quiescent current when the control signal indicates the power level of the RF input signal is below the predetermined range of power levels.

An amplifier having a Radio Frequency (RF) power level detector circuit for producing a control signal in accordance with a power level of an RF input signal. The control signal indicates whether the power level of the input signal is within a predetermined range of power levels greater than zero. A bias circuit is fed by the control signal, for producing a fixed bias voltage at a gate electrode of a field effect transistor (FET) to establish a predetermined quiescent current for the FET when the control signal indicates the power level of the RF input signal is within the predetermined range of power levels and to reduce the bias voltage to reduce the predetermined quiescent current when the control signal indicates the power level of the RF input signal is below the predetermined range of power levels.

Spatial power-combining devices having amplifier connectors are disclosed. A spatial power-combining device structure includes a plate including a first face, a second face that opposes the first face, an exterior surface between the first face and the second face, and a plurality of amplifier connectors accessible at the exterior surface. A waveguide assembly is coupled to the plate at the first face, the waveguide assembly including an inner housing including a plurality of antenna signal conductors and an outer housing including a plurality of antenna ground conductors. A coaxial waveguide section is coupled to the waveguide assembly. The plurality of amplifier connectors may be radially arranged in the plate. A plurality of amplifier modules are on the exterior surface and coupled to corresponding ones of the plurality of amplifier connectors.

A gate drive circuit includes a lower limit clamping circuit, an upper limit clamping circuit, and an averaging circuit. The lower limit clamping circuit clamps the input node of a transistor at a minimum voltage with respect to the common node of the transistor, while the upper limit clamping circuit clamps the input node of the transistor at a maximum voltage with respect to the common node of the transistor and the averaging circuit sets the average voltage of the input node with respect to the common node over a specified period of time. The transistor including a common node, an output node and an input node receives the input signal. Controlling the upper limit, lower limit and average value in conjunction with fast transitions between the lower and upper limits controls the duty cycle of the input signal.

A gate drive circuit includes a lower limit clamping circuit, an upper limit clamping circuit, and an averaging circuit. The lower limit clamping circuit clamps the input node of a transistor at a minimum voltage with respect to the common node of the transistor, while the upper limit clamping circuit clamps the input node of the transistor at a maximum voltage with respect to the common node of the transistor and the averaging circuit sets the average voltage of the input node with respect to the common node over a specified period of time. The transistor including a common node, an output node and an input node receives the input signal. Controlling the upper limit, lower limit and average value in conjunction with fast transitions between the lower and upper limits controls the duty cycle of the input signal.

A power amplifier module includes an amplifier that amplifies an input signal and outputs an amplified signal, a matching circuit disposed between an output terminal of the amplifier and a subsequent circuit, a choke inductor having a first end to which a power supply voltage is applied and a second end from which power supply is provided to the amplifier through the output terminal of the amplifier, and a first attenuation circuit disposed between the output terminal of the amplifier and the second end of the choke inductor and configured to attenuate a harmonic component of the amplified signal.

A power amplifier module includes an amplifier that amplifies an input signal and outputs an amplified signal, a matching circuit disposed between an output terminal of the amplifier and a subsequent circuit, a choke inductor having a first end to which a power supply voltage is applied and a second end from which power supply is provided to the amplifier through the output terminal of the amplifier, and a first attenuation circuit disposed between the output terminal of the amplifier and the second end of the choke inductor and configured to attenuate a harmonic component of the amplified signal.

Systems, apparatuses, and methods for efficiently generating a stable output for a transient load for one or more components are described. In various embodiments, a power converter includes two feedback loops to separate the stability and the equivalent output resistance, which allows the bandwidth to increase. The first loop includes a compensator receiving an output current of an amplifier. Additionally, a first converter and a first current mirror generate a target current based on the output current of the amplifier. Based on the target current, multiple step-down converters generate an output voltage, which is returned to the amplifier through a resistor. The second loop includes a second converter with a first order series RC filter to reduce the second loop's response time. A second current mirror receives current from the second converter and generates a dynamically adapting feedback current, which flows through the resistor in the first loop.

Systems, apparatuses, and methods for efficiently generating a stable output for a transient load for one or more components are described. In various embodiments, a power converter includes two feedback loops to separate the stability and the equivalent output resistance, which allows the bandwidth to increase. The first loop includes a compensator receiving an output current of an amplifier. Additionally, a first converter and a first current mirror generate a target current based on the output current of the amplifier. Based on the target current, multiple step-down converters generate an output voltage, which is returned to the amplifier through a resistor. The second loop includes a second converter with a first order series RC filter to reduce the second loop's response time. A second current mirror receives current from the second converter and generates a dynamically adapting feedback current, which flows through the resistor in the first loop.

A power amplifier module includes a substrate including, in an upper surface of the substrate, an active region and an element isolation region. The power amplifier module further includes a collector layer, a base layer, and an emitter layer that are stacked on the active region; an interlayer insulating film that covers the collector layer, the base layer, and the emitter layer; a pad that is thermally coupled to the element isolation region; and an emitter bump that is disposed on the interlayer insulating film, electrically connected to the emitter layer through a via hole provided in the interlayer insulating film, and electrically connected to the pad. In plan view, the emitter bump partially overlaps an emitter region which is a region of the emitter layer and through which an emitter current flows.