An RF power amplifier circuit includes a power divider, multiple power amplification circuits and a power combiner that cooperatively perform power amplification on an RF input signal so as to output an RF output signal, and an impedance conversion circuit that has a circuit terminal coupled to one of the power divider and the power combiner which has a microstrip structure, and that is configured such that a conversion impedance, which is an impedance seen into the impedance conversion circuit from the circuit terminal, matches an impedance seen into the power divider or the power combiner from the circuit terminal. The microstrip structure has a physical length associated with the conversion impedance.

An RF power amplifier circuit includes a power divider, multiple power amplification circuits and a power combiner that cooperatively perform power amplification on an RF input signal so as to output an RF output signal, and an impedance conversion circuit that has a circuit terminal coupled to one of the power divider and the power combiner which has a microstrip structure, and that is configured such that a conversion impedance, which is an impedance seen into the impedance conversion circuit from the circuit terminal, matches an impedance seen into the power divider or the power combiner from the circuit terminal. The microstrip structure has a physical length associated with the conversion impedance.

A power amplifier circuit includes a substrate and a semiconductor chip disposed on or above the substrate. The semiconductor chip includes a power amplifier unit that amplifies an RF signal, a ground terminal to which a ground of the power amplifier unit is coupled, and a first circuit element having a first end electrically coupled to the ground terminal without any portion outside the semiconductor chip interposed therebetween, and having a second end. The substrate includes a second circuit element having a first end electrically coupled to an output of the power amplifier unit and a second end electrically coupled to the second end of the first circuit element. The first and second circuit elements constitute a harmonic wave termination circuit. The harmonic wave termination circuit reflects, to the power amplifier unit, a harmonic wave component of the amplified RF signal output from the power amplifier unit.

A power amplifier circuit includes a substrate and a semiconductor chip disposed on or above the substrate. The semiconductor chip includes a power amplifier unit that amplifies an RF signal, a ground terminal to which a ground of the power amplifier unit is coupled, and a first circuit element having a first end electrically coupled to the ground terminal without any portion outside the semiconductor chip interposed therebetween, and having a second end. The substrate includes a second circuit element having a first end electrically coupled to an output of the power amplifier unit and a second end electrically coupled to the second end of the first circuit element. The first and second circuit elements constitute a harmonic wave termination circuit. The harmonic wave termination circuit reflects, to the power amplifier unit, a harmonic wave component of the amplified RF signal output from the power amplifier unit.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

A distributed active transformer includes an input transformer set and an output transformer set. Active stages are coupled between a transformer in the input transformer set and a transformer in the output transformer set. The input and output transformer sets are each configured as a slab transformer. The input slab transformer includes a single primary slab and many secondary slabs. The output slab transformer includes many primary slabs and a single secondary slab.

A distributed active transformer includes an input transformer set and an output transformer set. Active stages are coupled between a transformer in the input transformer set and a transformer in the output transformer set. The input and output transformer sets are each configured as a slab transformer. The input slab transformer includes a single primary slab and many secondary slabs. The output slab transformer includes many primary slabs and a single secondary slab.

A power amplifier module includes an amplifier that amplifies an input signal and outputs an amplified signal, a matching circuit disposed between an output terminal of the amplifier and a subsequent circuit, a choke inductor having a first end to which a power supply voltage is applied and a second end from which power supply is provided to the amplifier through the output terminal of the amplifier, and a first attenuation circuit disposed between the output terminal of the amplifier and the second end of the choke inductor and configured to attenuate a harmonic component of the amplified signal.

A power amplifier module includes an amplifier that amplifies an input signal and outputs an amplified signal, a matching circuit disposed between an output terminal of the amplifier and a subsequent circuit, a choke inductor having a first end to which a power supply voltage is applied and a second end from which power supply is provided to the amplifier through the output terminal of the amplifier, and a first attenuation circuit disposed between the output terminal of the amplifier and the second end of the choke inductor and configured to attenuate a harmonic component of the amplified signal.